Abstract: In a wireless communication base station device, a modulation unit carries out modulation processing for Dch data after coding to generate a Dch data symbol. A modulation unit carries out modulation processing for Lch data after coding to generate an Lch data symbol. An allocation unit allocates the Dch data symbol and Lch data symbol to each sub-carrier composing an OFDM symbol and outputs the allocated sub-carrier to a multiplex unit. In this case, the allocation unit allocates the Dch data symbol to a plurality of resource blocks where one Dch is arranged at an interval equal to integral multiples of the number of resource blocks composing a resource block group.

Abstract: A method for selecting a range of an information signal comprises the steps of detecting the area in which the information signal is specified among a plurality of range-specifying areas displayed on a display device and selecting the information signal range in a unit of the information signal determined in accordance with the range-specifying area in which the specification is executed. The unit of information signal to be selected is different according to which area is selected, so that at least two units of information signal are available for selection.

Abstract: An apparatus for storing digital data which is applied to a PCM audio tape recorder incorporates a data input circuit to receive data blocks each having block address data identifying the block, main data, and redundancy data forming an error detection/correction code together with data including block address data for detecting the presence/absence of errors in the block address data; an error detector to detect the presence/absence of errors in the block address data by use of the redundancy data and to produce an error detection signal when any error is detected; a first write address generator to generate first write address data; a first RAM to store the main data among the data block address to the first write address data; a second write address generator to generate second write address data; a second RAM to store the first write address data from the first write address generator according to the second write address data when the address data is determined to have no error by the error detector; a s