Patents by Inventor Akihiko Hiroe
Akihiko Hiroe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8241457Abstract: A microwave plasma processing system 10 includes: a processing chamber 100 in which a desired process is applied to a target object using a plasma; a susceptor 106 (stage) in the processing chamber 100 to support the target object; a high-frequency power supply 112 supplying high-frequency electric power to the susceptor 106; a capacitor 108a provided to the susceptor 106; and a measurement device 20 measuring voltages at the pair of plates of the capacitor 108a when high-frequency electric power is supplied from the high-frequency power supply 112 to the susceptor 106.Type: GrantFiled: March 28, 2008Date of Patent: August 14, 2012Assignees: Tokyo Electron Limited, Tohoku UniversityInventors: Mitsuo Kato, Masaki Sugiyama, Akihiko Hiroe, Tadahiro Ohmi, Masaki Hirayama
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Patent number: 7582569Abstract: A distributor (30) includes a square waveguide (31) to be connected to a microwave oscillator (20) and a square waveguide (41) having a plurality of openings (43) formed in a narrow wall (41B). The square waveguide (31) is hollow. A wave delaying member (53) having a relative dielectric constant ?r is arranged in the square waveguide (41). Narrow walls (31A, 41A) of the two square waveguides (31, 41) are brought into contact with each other, and a communication hole (32) through which the two waveguides (31, 41) communicate with each other is formed in the narrow walls (31A, 41A). The widths of the two waveguides (31, 41) do not become narrow at their connecting portion even if the width of the communication hole (32) is decreased. Thus, a band of a frequency that can pass through the connecting portion is suppressed from becoming narrow. Consequently, reflection loss that occurs when the frequency of electromagnetic waves to be input to the distributor (30) changes can be decreased.Type: GrantFiled: March 10, 2004Date of Patent: September 1, 2009Assignees: Tokyo Electron LimitedInventors: Tadahiro Ohmi, Naohisa Goto, Nobuhiro Kuga, Akihiko Hiroe
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Publication number: 20090050895Abstract: In a semiconductor manufacturing method that manufactures a coplanar type thin film transistor, a microcrystalline film 10 that will become a channel region is formed on a glass substrate S, a sacrificial silicon oxide 20 film is formed on the microcrystalline film 10, and, in a state in which a surface boundary of the microcrystalline film 10 is protected by the sacrificial silicon oxide film 20, a doped silicon film 30 is built up that will become a source region and a drain region. A photoresist R film is applied on the doped silicon film 30 and planarized. With the sacrificial silicon oxide film 20 in an uncovered state, etching is performed until the microcrystalline film 10 and the doped silicon film 30 reside in approximately the same plane.Type: ApplicationFiled: August 21, 2008Publication date: February 26, 2009Applicants: TOKYO ELECTRON LIMITED, NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITYInventors: Akihiko Hiroe, Akinobu Teramoto, Tadahiro Ohmi
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Publication number: 20080241016Abstract: A microwave plasma processing system 10 includes: a processing chamber 100 in which a desired process is applied to a target object using a plasma; a susceptor 106 (stage) in the processing chamber 100 to support the target object; a high-frequency power supply 112 supplying high-frequency electric power to the susceptor 106; a capacitor 108a provided to the susceptor 106; and a measurement device 20 measuring voltages at the pair of plates of the capacitor 108a when high-frequency electric power is supplied from the high-frequency power supply 112 to the susceptor 106.Type: ApplicationFiled: March 28, 2008Publication date: October 2, 2008Applicants: TOKYO ELECTRON LIMITED, Tohoku UniversityInventors: Mitsuo KATO, Masaki Sugiyama, Akihiko Hiroe, Tadahiro Ohmi, Masaki Hirayama
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Publication number: 20070133919Abstract: A distributor (30) includes a square waveguide (31) to be connected to a microwave oscillator (20) and a square waveguide (41) having a plurality of openings (43) formed in a narrow wall (41B). The square waveguide (31) is hollow. A wave delaying member (53) having a relative dielectric constant ?r is arranged in the square waveguide (41). Narrow walls (31A, 41A) of the two square waveguides (31, 41) are brought into contact with each other, and a communication hole (32) through which the two waveguides (31, 41) communicate with each other is formed in the narrow walls (31A, 41A). The widths of the two waveguides (31, 41) do not become narrow at their connecting portion even if the width of the communication hole (32) is decreased. Thus, a band of a frequency that can pass through the connecting portion is suppressed from becoming narrow. Consequently, reflection loss that occurs when the frequency of electromagnetic waves to be input to the distributor (30) changes can be decreased.Type: ApplicationFiled: March 10, 2004Publication date: June 14, 2007Applicants: TOKYO ELECTRON LIMITEDInventors: Tadahiro Ohmi, Naohisa Goto, Nobuhiro Kuga, Akihiko Hiroe
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Publication number: 20070054064Abstract: A microwave plasma processing method and, in which a linear plasma is produced by means of a microwave, and an object to be processed is subjected to processing under atmospheric pressure or under a pressure near atmospheric pressure when the object is moved, while a surface of the object is maintained at a horizontal position with respect to the linear plasma. A plasma head has an H-plane slot antenna, and slots are arranged alternately on both sides of a centerline of a waveguide at a pitch of ?g/2 (?g: wavelength of the microwave with the waveguide). A uniforming line having a distance of n·?g/2 from the slots to an emission end of the plasma head is provided (n: an integral number).Type: ApplicationFiled: December 24, 2004Publication date: March 8, 2007Inventors: Tadahiro Ohmi, Masaki Hirayama, Takahiro Horiguchi, Akihiko Hiroe, Masayuki Kitamura
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Publication number: 20030141016Abstract: In an exhaust system for a processing apparatus wherein a processing gas is used to subject a semiconductor wafer W to be processed to a predetermined processing, a vacuum exhaust pathway 40 having a vacuum pump 42 is connected to the processing apparatus 20. A trap mechanism 52 for removing reaction products that flow into the vacuum exhaust pathway 40 is provided within the vacuum exhaust pathway 40, via disconnectable connection flanges 78 and 86 on the upstream side of the vacuum pump 42. An upstream-side inlet portion and an outlet portion of this trap mechanism 52 are provided with isolation valves 80 and 88 that can place the interior of the trap mechanism in a hermetically sealed state when necessary. A bypass pathway 54 is provided to allow a cleaning gas to bypass the trap mechanism 52 during the cleaning of the processing apparatus 20.Type: ApplicationFiled: January 30, 2003Publication date: July 31, 2003Inventors: Wataru Okase, Noriaki Matsushima, Akihiko Tsukada, Akihiko Hiroe, Kouji Shimomura
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Patent number: 6319327Abstract: Disclosed is an MOCVD system for forming a tantalum oxide film on a semiconductor wafer, while using pentoethoxytantalum as a liquid raw material. In the system, a raw material tank is connected to a vaporizing unit through an upstream main line with a flow control unit. The vaporizing unit is connected to the process chamber of a film-forming unit through a downstream main line. A partition wall is arranged to surround the entire system so as to isolate it from the other space in the clean room. The raw material tank, the flow control unit, and part of the upstream main line therebetween are accommodated in a constant temperature and heat insulating box all together and are kept at a temperature of from 25 to 35° C.Type: GrantFiled: July 24, 2000Date of Patent: November 20, 2001Assignee: Tokyo Electron LimitedInventors: Akihiko Tsukada, Akihiko Hiroe, Kouji Shimomura
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Patent number: 5264710Abstract: Amorphous semiconductor thin film is exposed to an atmosphere of hydrogen radical during or after the formation of thin film, or is subject to light irradiation having a density of not less than 10 W/cm.sup.2 at a wavelength of 300 to 700 nm during the formation of the thin film. The obtained thin film has improved, i.e. small, photo deterioration. The semiconductor device using the above thin film is preferably applied to solar cells or thin film transistors.Type: GrantFiled: April 7, 1992Date of Patent: November 23, 1993Assignee: Kanegafuchi Kagaku Kogyo Kabushiki KaishaInventors: Hideo Yamagishi, Akihiko Hiroe, Hitoshi Nishio, Keiko Miki, Kazunori Tsuge, Yoshihisa Tawada
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Patent number: 5068526Abstract: A photoelectric conversion device comprises a first voltage source for providing a first predetermined voltage, a photoconductive cell having a first end connected to the first voltage source and a second end, the photoconductive cell being provided so as to receive an optical radiation and having a resistance that is changed in response to the optical radiation supplied to the photoconductive cell, a load resistance having a first end connected to the second end of the photoconductive cell and a second end, a second voltage source connected to the second end of the load resistance for providing thereto a second predetermined voltage that is different from the first predetermined voltage, and threshold detection circuit having an input terminal connected to the second end of the photoconductive cell, wherein the threshold detection circuit has a threshold level and produces a first output signal having a first level when an input signal supplied to the input terminal has a level below the threshold level whilType: GrantFiled: September 12, 1990Date of Patent: November 26, 1991Assignee: Ricoh Company, Ltd.Inventor: Akihiko Hiroe
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Patent number: 5032884Abstract: A semiconductor device comprising a pin-type or nip-type amorphous-containing semiconductor layers; characterized in that (1) at least one interlayer made of semiconductor or insulator having higher electrical resistivity than a semiconductor which adjoins the interlayer is/are interposed between semiconductor layers or between a semiconductor and an electrode, (2) an amount of dopant in a p-type or n-type layer is least at a junction interface of p/i or n/i and increases gradually toward a junction interface of p/electrode or n/electrode, or (3) a p-type semiconductor layer being the same conductive type as the p-type semiconductor and having higher impurity density and/or an n-type semiconductor layer being the same conductive type as the n-type semiconductor layer and having higher impurity density is/are interposed between the p-type semiconductor layer and the electrode at the side of the p-type semiconductor layer and/or between the n-type semiconductor layer and the electrode at the side of the n-typeType: GrantFiled: February 7, 1990Date of Patent: July 16, 1991Assignee: Kanegafuchi Kagaku Kogyo Kabushiki KaishaInventors: Hideo Yamagishi, Masataka Kondo, Kunio Nishimura, Akihiko Hiroe, Keizou Asaoka, Kazunori Tsuge, Yoshihisa Tawada, Minori Yamaguchi
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Patent number: 5027382Abstract: A shift register circuit comprises a series circuit comprising a plurality of first clocked gate inverters and inverters which are alternately connected in series, where a first one of the first clocked gate inverters is adapted to receive an input pulse signal, an output line connected to an output of each of the inverters for outputting an output pulse signal, and a second clocked gate inverter connected to the output of each of the inverters for outputting an output pulse signal. The first clocked gate inverters operate responsive to a first clock signal, and the second clocked gate inverters operate responsive to a second clock signal which is different from the first clock signal.Type: GrantFiled: December 15, 1989Date of Patent: June 25, 1991Assignees: Ricoh Company, Ltd., Ricoh Research Institute of General Electronics Co., Ltd.Inventors: Akihiko Hiroe, Noriyuki Terao
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Patent number: 5015838Abstract: A color sensor of the present invention is a semiconductor element comprising a semiconductor wherein a plurality of pn or pin junctions are laminated, and conductive layers which are laminated on both surfaces of the semiconductor, characterized in that the semiconductor element is arranged in a way that the quantity of production of photocarriers is increased in order from the light incident side for the whole wave length band to be measured, and that value of current is detected by changing voltage between both conductivity layers. According to the color sensor of the present invention, the construction can be simplified, it is easily integrated and large-scaled, manufacturing process can be simplified, and the yield of color sensors increases, so that there can be realized a color sensor with low cost.Type: GrantFiled: January 27, 1989Date of Patent: May 14, 1991Assignee: Kanegafuchi Kagaku Kogyo Kabushiki KaishaInventors: Hideo Yamagishi, Akihiko Hiroe, Hitoshi Nishio, Satoru Murakami, Keiko Miki, Minori Yamaguchi, Seishiro Mizukami, Yoshihisa Tawada
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Patent number: 4926230Abstract: A photovoltaic device of amorphous or microcrystalline semiconductor having multijunction wherein one or more layer including high concentration impurities is interposed between p-type conductive layer and n-type conductive layer. A tunnel junction is formed by the interposed layer to elevate the photo-electric conversion rate.Type: GrantFiled: July 10, 1989Date of Patent: May 15, 1990Assignee: Kanegafuchi Kagaku Kogyo Kabushiki KaishaInventors: Hideo Yamagishi, Minori Yamaguchi, Keizo Asaoka, Akihiko Hiroe, Masataka Kondo, Kazunori Tsuge, Yoshihisa Tawada