Patents by Inventor Akihiko Kato
Akihiko Kato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12132165Abstract: An all-solid-state battery includes an electrode body in which a cathode layer that contains a cathode active material and a solid electrolyte, an electrolyte layer that is formed of the solid electrolyte, and an anode layer that contains an anode active material and the solid electrolyte are stacked in this order in an up-down direction, in which the cathode active material is a compound represented by a chemical formula Li2Fe(1-x)MxP(2-y)AyO7, contains at least one metal of Ti, V, Cr, Ni, and Co as the M in the chemical formula, and contains at least one element of B, C, Al, Si, Ga, and Ge as the A in the chemical formula, the x in the chemical formula satisfies 0.8<x?1, the y in the chemical formula satisfies 0?y?0.07, and the anode active material is an anatase titanium oxide represented by a chemical formula TiO2.Type: GrantFiled: August 19, 2020Date of Patent: October 29, 2024Assignee: FDK CORPORATIONInventors: Shinzo Fujii, Yuji Goto, Masakazu Kobayashi, Tomohiro Fujisawa, Yoichiro Kawano, Masanori Nakanishi, Chihiro Yamamoto, Akihiko Kato
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Patent number: 12052522Abstract: A light detecting device includes: one or more switch transistors, a first pixel including a first floating diffusion region coupled to a first photoelectric converter through a first transfer transistor, and a first amplification transistor coupled to the first floating diffusion region, a second pixel including a second floating diffusion region coupled to a second photoelectric converter through a second transfer transistor, and a second amplification transistor coupled to the second floating diffusion region, and a third pixel including a third floating diffusion region coupled to a third photoelectric converter through a third transfer transistor, and a third amplification transistor coupled to the third floating diffusion region. A pixel signal is differentially amplified by the first and third amplification transistors. The first and second floating diffusion regions are selectively connected to each other via one of the one or more switch transistors.Type: GrantFiled: February 28, 2020Date of Patent: July 30, 2024Assignee: Sony Semiconductor Solutions CorporationInventors: Mamoru Sato, Akihiko Kato, Eriko Kato
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Publication number: 20240096913Abstract: There is provided a solid-state imaging element capable of increasing a channel area of a pixel transistor and reducing a parasitic capacitance of a gate.Type: ApplicationFiled: November 9, 2021Publication date: March 21, 2024Inventors: AKIHIKO KATO, TOSHIHIRO KUROBE, AKIKO HONJO, KOICHI BABA, NAOHIKO KIMIZUKA, YOHEI HIROSE, TOYOTAKA KATAOKA, TAKUYA TOYOFUKU
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Publication number: 20240080587Abstract: To reduce the number of wirings through which transmission and reception are made between chips. The solid-state imaging device includes a first substrate including a pixel array unit in which a plurality of pixels is arranged, each of the plurality of pixels including a photoelectric conversion unit, and the first substrate includes a first wiring through which an imaging pixel signal is transmitted, the imaging pixel signal being read from two or more of the pixels arranged in a first direction in the pixel array unit, a second wiring through which a reset voltage for initializing the first wiring is supplied, and a first switching circuit configured to switch whether or not to short-circuit the first wiring and the second wiring.Type: ApplicationFiled: December 28, 2021Publication date: March 7, 2024Inventors: ERIKO KATO, AKIHIKO KATO
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Publication number: 20230041457Abstract: To improve the image quality of image data in a solid-state imaging device that reads a signal according to a potential difference between respective floating diffusion regions of a pair of pixels. A pixel unit is provided with a plurality of rows each including a plurality of pixels. A readout row selection unit selects any of the plurality of rows as a readout row every time a predetermined period elapses, and causes each of the plurality of pixels in the readout row to generate a signal potential according to a received light amount. A reference row selection unit selects a row different from a previous row from among the plurality of rows as a current reference row every time the predetermined period elapses, and causes each of the plurality of pixels in the reference row to generate a predetermined reference potential. A readout circuit unit reads a voltage signal according to a difference between the signal potential and the reference potential.Type: ApplicationFiled: October 24, 2022Publication date: February 9, 2023Inventors: Mamoru Sato, Akihiko Kato, Yusuke Oike
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Patent number: 11553148Abstract: To improve the image quality of image data in a solid-state imaging device that reads a signal according to a potential difference between respective floating diffusion regions of a pair of pixels. A pixel unit is provided with a plurality of rows each including a plurality of pixels. A readout row selection unit selects any of the plurality of rows as a readout row every time a predetermined period elapses, and causes each of the plurality of pixels in the readout row to generate a signal potential according to a received light amount. A reference row selection unit selects a row different from a previous row from among the plurality of rows as a current reference row every time the predetermined period elapses, and causes each of the plurality of pixels in the reference row to generate a predetermined reference potential. A readout circuit unit reads a voltage signal according to a difference between the signal potential and the reference potential.Type: GrantFiled: January 10, 2019Date of Patent: January 10, 2023Assignee: Sony Semiconductor Solutions CorporationInventors: Mamoru Sato, Akihiko Kato, Yusuke Oike
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Patent number: 11438543Abstract: A solid-state imaging device is disclosed. In one example, a solid-state imaging device includes a current mirror circuit connected to first and second vertical signal lines, first and second unit pixels connected to the first or the second vertical signal line, a current supply line connected to the first and the second unit pixels, and a constant current circuit connected to the current supply line. The unit pixels each include a photoelectric conversion element, a transfer transistor that transfers an electric charge generated in the photoelectric conversion element, first and second charge accumulation units that accumulate the transferred electric charge, a switching transistor configured to control accumulation of the electric charge by the second charge accumulation unit, and an amplification transistor that causes a voltage corresponding to electric charges accumulated the first and/or the second charge accumulation units to appear in the first or the second vertical signal line.Type: GrantFiled: August 16, 2019Date of Patent: September 6, 2022Assignee: Sony Semiconductor Solutions CorporationInventors: Mamoru Sato, Akihiko Kato
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Publication number: 20220141411Abstract: To improve charge transfer efficiency in a solid-state imaging device that transfers a charge from a photoelectric conversion element to a floating diffusion layer. A solid-state imaging device is provided with a transfer transistor and a potential control unit. In this solid-state imaging device, the transfer transistor transfers a charge from a photoelectric conversion element to a floating diffusion layer in a predetermined transfer period according to a transfer signal transmitted through a predetermined transfer line. Furthermore, the potential control unit makes a potential in a transfer period of a predetermined signal line capacitively coupled with the floating diffusion layer higher than that outside the transfer period.Type: ApplicationFiled: November 28, 2019Publication date: May 5, 2022Inventors: MAMORU SATO, AKIHIKO KATO, YUSUKE OIKE, HIDEHIRO HARATA, HIDEKI NAGANUMA
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Publication number: 20220060646Abstract: A light detecting device includes: one or more switch transistors, a first pixel including a first floating diffusion region coupled to a first photoelectric converter through a first transfer transistor, and a first amplification transistor coupled to the first floating diffusion region, a second pixel including a second floating diffusion region coupled to a second photoelectric converter through a second transfer transistor, and a second amplification transistor coupled to the second floating diffusion region, and a third pixel including a third floating diffusion region coupled to a third photoelectric converter through a third transfer transistor, and a third amplification transistor coupled to the third floating diffusion region. A pixel signal is differentially amplified by the first and third amplification transistors. The first and second floating diffusion regions are selectively connected to each other via one of the one or more switch transistors.Type: ApplicationFiled: February 28, 2020Publication date: February 24, 2022Inventors: Mamoru Sato, Akihiko Kato, Eriko Kato
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Patent number: 11228726Abstract: An imaging device includes a plurality of pixels including a first pixel and a second pixel, and a differential amplifier including a first amplification transistor, a second amplification transistor, and a first load transistor. The first load transistor receives a power source voltage. The imaging device includes a first signal line coupled to the first amplification transistor and the first load transistor, a second signal line coupled to the second amplification transistor, and a first reset transistor configured to receive the power source voltage. A gate of the first reset transistor is coupled to the first load transistor. The first pixel includes a first photoelectric conversion element and the first amplification transistor, and the second pixel includes a second photoelectric conversion element and the second amplification transistor.Type: GrantFiled: December 9, 2020Date of Patent: January 18, 2022Assignee: Sony Semiconductor Solutions CorporationInventors: Hongbo Zhu, Mamoru Sato, Akihiko Kato
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Publication number: 20210168317Abstract: A solid-state imaging device is disclosed. In one example, a solid-state imaging device includes a current mirror circuit connected to first and second vertical signal lines, first and second unit pixels connected to the first or the second vertical signal line, a current supply line connected to the first and the second unit pixels, and a constant current circuit connected to the current supply line. The unit pixels each include a photoelectric conversion element, a transfer transistor that transfers an electric charge generated in the photoelectric conversion element, first and second charge accumulation units that accumulate the transferred electric charge, a switching transistor configured to control accumulation of the electric charge by the second charge accumulation unit, and an amplification transistor that causes a voltage corresponding to electric charges accumulated the first and/or the second charge accumulation units to appear in the first or the second vertical signal line.Type: ApplicationFiled: August 16, 2019Publication date: June 3, 2021Inventors: Mamoru Sato, Akihiko Kato
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Publication number: 20210144326Abstract: To improve the image quality of image data in a solid-state imaging device that reads a signal according to a potential difference between respective floating diffusion regions of a pair of pixels. A pixel unit is provided with a plurality of rows each including a plurality of pixels. A readout row selection unit selects any of the plurality of rows as a readout row every time a predetermined period elapses, and causes each of the plurality of pixels in the readout row to generate a signal potential according to a received light amount. A reference row selection unit selects a row different from a previous row from among the plurality of rows as a current reference row every time the predetermined period elapses, and causes each of the plurality of pixels in the reference row to generate a predetermined reference potential. A readout circuit unit reads a voltage signal according to a difference between the signal potential and the reference potential.Type: ApplicationFiled: January 10, 2019Publication date: May 13, 2021Inventors: Mamoru Sato, Akihiko Kato, Yusuke Oike
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Patent number: 10972689Abstract: To prevent the black dot phenomenon from occurring in a differential amplification-type solid-state image sensor. A signal-side amplifier transistor generates an output voltage corresponding to a signal current corresponding to one of a pair of differential input voltages by supplying the signal current from an output node to a common-phase node. A reference-side amplifier transistor supplies a reference current corresponding to the other one of the pair of differential input voltages to the common-phase node. A constant current source constantly controls a sum of the signal current and the reference current to be merged at the common-phase node. A bypass control unit connects the output node and the common-phase node and supplies the signal current having a value corresponding to a predetermined limit voltage to the common-phase node in a case in which the output voltage reaches the limit voltage.Type: GrantFiled: March 26, 2020Date of Patent: April 6, 2021Assignee: Sony CorporationInventors: Mamoru Sato, Akihiko Kato
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Publication number: 20210092317Abstract: An imaging device includes a plurality of pixels including a first pixel and a second pixel, and a differential amplifier including a first amplification transistor, a second amplification transistor, and a first load transistor. The first load transistor receives a power source voltage. The imaging device includes a first signal line coupled to the first amplification transistor and the first load transistor, a second signal line coupled to the second amplification transistor, and a first reset transistor configured to receive the power source voltage. A gate of the first reset transistor is coupled to the first load transistor. The first pixel includes a first photoelectric conversion element and the first amplification transistor, and the second pixel includes a second photoelectric conversion element and the second amplification transistor.Type: ApplicationFiled: December 9, 2020Publication date: March 25, 2021Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Hongbo ZHU, Mamoru SATO, Akihiko KATO
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Patent number: 10887538Abstract: An imaging device includes a plurality of pixels including a first pixel and a second pixel, and a differential amplifier including a first amplification transistor, a second amplification transistor, and a first load transistor. The first load transistor receives a power source voltage. The imaging device includes a first signal line coupled to the first amplification transistor and the first load transistor, a second signal line coupled to the second amplification transistor, and a first reset transistor configured to receive the power source voltage. A gate of the first reset transistor is coupled to the first load transistor. The first pixel includes a first photoelectric conversion element and the first amplification transistor, and the second pixel includes a second photoelectric conversion element and the second amplification transistor.Type: GrantFiled: October 17, 2017Date of Patent: January 5, 2021Assignee: Sony Semiconductor Solutions CorporationInventors: Hongbo Zhu, Mamoru Sato, Akihiko Kato
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Publication number: 20200381775Abstract: An all-solid-state battery includes an electrode body in which a cathode layer that contains a cathode active material and a solid electrolyte, an electrolyte layer that is formed of the solid electrolyte, and an anode layer that contains an anode active material and the solid electrolyte are stacked in this order in an up-down direction, in which the cathode active material is a compound represented by a chemical formula Li2Fe(1-x)MxP(2-y)AyO7, contains at least one metal of Ti, V, Cr, Ni, and Co as the M in the chemical formula, and contains at least one element of B, C, Al, Si, Ga, and Ge as the A in the chemical formula, the x in the chemical formula satisfies 0.8<x?1, the y in the chemical formula satisfies 0?y?0.07, and the anode active material is an anatase titanium oxide represented by a chemical formula TiO2.Type: ApplicationFiled: August 19, 2020Publication date: December 3, 2020Applicant: FDK CORPORATIONInventors: Shinzo Fujii, Yuji Goto, Masakazu Kobayashi, Tomohiro Fujisawa, Yoichiro Kawano, Masanori Nakanishi, Chihiro Yamamoto, Akihiko Kato
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Publication number: 20200228735Abstract: To prevent the black dot phenomenon from occurring in a differential amplification-type solid-state image sensor. A signal-side amplifier transistor generates an output voltage corresponding to a signal current corresponding to one of a pair of differential input voltages by supplying the signal current from an output node to a common-phase node. A reference-side amplifier transistor supplies a reference current corresponding to the other one of the pair of differential input voltages to the common-phase node. A constant current source constantly controls a sum of the signal current and the reference current to be merged at the common-phase node. A bypass control unit connects the output node and the common-phase node and supplies the signal current having a value corresponding to a predetermined limit voltage to the common-phase node in a case in which the output voltage reaches the limit voltage.Type: ApplicationFiled: March 26, 2020Publication date: July 16, 2020Applicant: Sony CorporationInventors: Mamoru Sato, Akihiko Kato
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Patent number: 10694128Abstract: A solid-state image pickup apparatus includes a pixel array unit in which image signal generation pixels for generating analog image signals in response to light irradiated thereupon and correction signal generation pixels for generating analog correction signals for correcting the image signals are arranged in a matrix pattern. A conversion unit performs first conversion that is conversion from the analog image signals generated by the image signal generation pixels arranged in a row in the matrix pattern into digital image signals. The conversion unit further performs second conversion, which is conversion performed at substantially the same time with the first conversion, from the analog correction signals generated by the correction signal generation pixels arranged in a plurality of rows in the matrix pattern into digital correction signals. A correction unit performs correction of the digital image signals with the digital correction signals generated in the plurality of rows.Type: GrantFiled: June 3, 2016Date of Patent: June 23, 2020Assignee: SONY CORPORATIONInventors: Akihiko Kato, Yusuke Oike
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Patent number: 10645318Abstract: To prevent the black dot phenomenon from occurring in a differential amplification-type solid-state image sensor. A signal-side amplifier transistor generates an output voltage corresponding to a signal current corresponding to one of a pair of differential input voltages by supplying the signal current from an output node to a common-phase node. A reference-side amplifier transistor supplies a reference current corresponding to the other one of the pair of differential input voltages to the common-phase node. A constant current source constantly controls a sum of the signal current and the reference current to be merged at the common-phase node. A bypass control unit connects the output node and the common-phase node and supplies the signal current having a value corresponding to a predetermined limit voltage to the common-phase node in a case in which the output voltage reaches the limit voltage.Type: GrantFiled: September 4, 2019Date of Patent: May 5, 2020Assignee: Sony CorporationInventors: Mamoru Sato, Akihiko Kato
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Publication number: 20190394413Abstract: To prevent the black dot phenomenon from occurring in a differential amplification-type solid-state image sensor. A signal-side amplifier transistor generates an output voltage corresponding to a signal current corresponding to one of a pair of differential input voltages by supplying the signal current from an output node to a common-phase node. A reference-side amplifier transistor supplies a reference current corresponding to the other one of the pair of differential input voltages to the common-phase node. A constant current source constantly controls a sum of the signal current and the reference current to be merged at the common-phase node. A bypass control unit connects the output node and the common-phase node and supplies the signal current having a value corresponding to a predetermined limit voltage to the common-phase node in a case in which the output voltage reaches the limit voltage.Type: ApplicationFiled: September 4, 2019Publication date: December 26, 2019Applicant: Sony CorporationInventors: Mamoru Sato, Akihiko Kato