Patents by Inventor Akihiko Miyanohara

Akihiko Miyanohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240073560
    Abstract: To control an excess bias to an appropriate value in a light detection device. A solid-state image sensor includes a photodiode, a resistor, and a control circuit. In this solid-state image sensor, the photodiode photoelectrically converts incident light and outputs a photocurrent. Furthermore, in the solid-state image sensor, the resistor is connected to a cathode of the photodiode. Furthermore, in the solid-state image sensor, the control circuit supplies a lower potential to an anode of the photodiode as a potential of the cathode of when the photocurrent flows through the resistor is higher.
    Type: Application
    Filed: October 12, 2023
    Publication date: February 29, 2024
    Inventors: Tatsuki Nishino, Hiroki Hiyama, Shizunori Matsumoto, Takahiro Miura, Akihiko Miyanohara, Tomohiro Matsumoto
  • Patent number: 11818481
    Abstract: To control an excess bias to an appropriate value in a light detection device. A solid-state image sensor includes a photodiode, a resistor, and a control circuit. In this solid-state image sensor, the photodiode photoelectrically converts incident light and outputs a photocurrent. Furthermore, in the solid-state image sensor, the resistor is connected to a cathode of the photodiode. Furthermore, in the solid-state image sensor, the control circuit supplies a lower potential to an anode of the photodiode as a potential of the cathode of when the photocurrent flows through the resistor is higher.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: November 14, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Tatsuki Nishino, Hiroki Hiyama, Shizunori Matsumoto, Takahiro Miura, Akihiko Miyanohara, Tomohiro Matsumoto
  • Publication number: 20230124216
    Abstract: In a sensing device that generates a distance image, a variation in distance measurement accuracy in the distance image is reduced. The sensing device includes a predetermined number of pixel circuits and a voltage control unit. Each of the predetermined number of pixel circuits includes a photoelectric conversion element and a detection circuit. A predetermined reverse bias voltage is applied between an anode and a cathode of the photoelectric conversion element. The detection circuit detects whether a photon is present or absent on the basis of a potential of either the anode or the cathode. The voltage control unit adjusts the reverse bias voltage to a value corresponding to a breakdown voltage of the photoelectric conversion element for each of the pixel circuits.
    Type: Application
    Filed: December 21, 2020
    Publication date: April 20, 2023
    Inventors: AKIHIKO MIYANOHARA, HIROKI HIYAMA
  • Publication number: 20230086897
    Abstract: To control an excess bias to an appropriate value in a light detection device. A solid-state image sensor includes a photodiode, a resistor, and a control circuit. In this solid-state image sensor, the photodiode photoelectrically converts incident light and outputs a photocurrent. Furthermore, in the solid-state image sensor, the resistor is connected to a cathode of the photodiode. Furthermore, in the solid-state image sensor, the control circuit supplies a lower potential to an anode of the photodiode as a potential of the cathode of when the photocurrent flows through the resistor is higher.
    Type: Application
    Filed: November 15, 2022
    Publication date: March 23, 2023
    Inventors: Tatsuki Nishino, Hiroki Hiyama, Shizunori Matsumoto, Takahiro Miura, Akihiko Miyanohara, Tomohiro Matsumoto
  • Patent number: 11533445
    Abstract: To control an excess bias to an appropriate value in a light detection device. A solid-state image sensor includes a photodiode, a resistor, and a control circuit. In this solid-state image sensor, the photodiode photoelectrically converts incident light and outputs a photocurrent. Furthermore, in the solid-state image sensor, the resistor is connected to a cathode of the photodiode. Furthermore, in the solid-state image sensor, the control circuit supplies a lower potential to an anode of the photodiode as a potential of the cathode of when the photocurrent flows through the resistor is higher.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: December 20, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Tatsuki Nishino, Hiroki Hiyama, Shizunori Matsumoto, Takahiro Miura, Akihiko Miyanohara, Tomohiro Matsumoto
  • Publication number: 20220345652
    Abstract: In a solid-state imaging element that measures a distance, miniaturization of pixels is facilitated. The solid-state imaging element includes a pixel array unit and a photon number detection unit. In the solid-state imaging element including the pixel array unit and the photon number detection unit, the pixel array unit is provided with a plurality of pixels that generates a predetermined analog signal depending on incidence of a photon and a signal line to which the plurality of pixels is connected in common. Furthermore, in the solid-state imaging element, the photon number detection unit detects the number of photons incident, on the basis of the analog signal transmitted via the signal line.
    Type: Application
    Filed: July 13, 2020
    Publication date: October 27, 2022
    Inventors: MASAMUNE HAMAMATSU, AKIHIKO MIYANOHARA
  • Publication number: 20220291342
    Abstract: Proposed is a ranging system capable of improving the accuracy of ranging. A ranging system (70) includes: a drive unit (24) that causes a light emitting element to emit light and outputs a drive signal for irradiating a target with light; a sensor unit (302) that detects reflected light from the target; a measurement unit (23) that measures a delay time that is included in a time from timing at which a trigger signal for causing the light emitting element to emit light is output to timing at which the light emitting element actually emits light; and a ranging observation unit (52) which is a processing unit that performs a process of calculating a distance to the target on the basis of output timing of the trigger signal, light receiving timing of the reflected light obtained by the sensor unit, and the delay time.
    Type: Application
    Filed: August 27, 2020
    Publication date: September 15, 2022
    Inventors: Daisuke Suzuki, Takashi Masuda, Mitsushi Tabata, Kouta Hiyama, Koichi Okamoto, Akihiko Miyanohara
  • Publication number: 20200314375
    Abstract: To control an excess bias to an appropriate value in a light detection device. A solid-state image sensor includes a photodiode, a resistor, and a control circuit. In this solid-state image sensor, the photodiode photoelectrically converts incident light and outputs a photocurrent. Furthermore, in the solid-state image sensor, the resistor is connected to a cathode of the photodiode. Furthermore, in the solid-state image sensor, the control circuit supplies a lower potential to an anode of the photodiode as a potential of the cathode of when the photocurrent flows through the resistor is higher.
    Type: Application
    Filed: August 24, 2018
    Publication date: October 1, 2020
    Inventors: Tatsuki Nishino, Hiroki Hiyama, Shizunori Matsumoto, Takahiro Miura, Akihiko Miyanohara, Tomohiro Matsumoto
  • Patent number: 9025062
    Abstract: A solid-state imaging device includes a pixel array unit having a plurality of pixels arranged in a matrix form which perform a photoelectric conversion, a pixel signal readout unit having a logic unit and performing a readout of a pixel signal from the pixel array unit, a regulator, a first circuit section, a second circuit section, and a stacked structure in which the first and second circuit sections are bonded, wherein the first circuit section has the pixel array unit disposed therein, and wherein the second circuit section has at least the logic unit and the regulator disposed therein, wherein the regulator includes a reference voltage generation, a plurality of output stage transistors, and an operational amplifier comparing the reference voltage and a commonized output voltage, and an output path of the output stage transistors are connected to a single node, and then is fed back to the operational amplifier.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: May 5, 2015
    Assignee: Sony Corporation
    Inventors: Shimon Teshima, Kenichi Shigenami, Akihiko Miyanohara, Shoji Kobayashi
  • Publication number: 20140253770
    Abstract: A solid-state imaging device includes a pixel array unit having a plurality of pixels arranged in a matrix form which perform a photoelectric conversion, a pixel signal readout unit having a logic unit and performing a readout of a pixel signal from the pixel array unit, a regulator, a first circuit section, a second circuit section, and a stacked structure in which the first and second circuit sections are bonded, wherein the first circuit section has the pixel array unit disposed therein, and wherein the second circuit section has at least the logic unit and the regulator disposed therein, wherein the regulator includes a reference voltage generation, a plurality of output stage transistors, and an operational amplifier comparing the reference voltage and a commonized output voltage, and an output path of the output stage transistors are connected to a single node, and then is fed back to the operational amplifier.
    Type: Application
    Filed: May 20, 2014
    Publication date: September 11, 2014
    Applicant: Sony Corporation
    Inventors: Shimon Teshima, Kenichi Shigenami, Akihiko Miyanohara, Shoji Kobayashi
  • Patent number: 8767107
    Abstract: A solid-state imaging device includes a pixel array unit having a plurality of pixels arranged in a matrix form which perform a photoelectric conversion, a pixel signal readout unit having a logic unit and performing a readout of a pixel signal from the pixel array unit, a regulator, a first chip, a second chip, and a stacked structure in which both the first chip and the second chip are bonded, wherein the first chip has the pixel array unit disposed therein, and wherein the second chip has at least the logic unit and the regulator disposed therein, wherein the regulator includes a reference voltage generation, a plurality of output stage transistors, and an operational amplifier comparing the reference voltage and a commonized output voltage, and an output path of the output stage transistors are connected to a single node, and then is fed back to the operational amplifier.
    Type: Grant
    Filed: October 22, 2012
    Date of Patent: July 1, 2014
    Assignee: Sony Corporation
    Inventors: Shimon Teshima, Kenichi Shigenami, Akihiko Miyanohara, Shoji Kobayashi
  • Patent number: 7205736
    Abstract: Methods and systems for driving a motor are disclosed. A center tap voltage and a desired center tap voltage are used to generate a voltage feedback. A power amplifier receives a reference current and the voltage feedback. The power amplifier provides a phase current to a phase of a motor. The phase current is substantially centered about the desired center tap voltage as a consequence of the voltage feedback. Thus, high-side to low-side or state to state current variations are reduced thereby reducing the occurrence of problems such as torque ripple and back EMF.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: April 17, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Jonathan R. Knight, Akihiko Miyanohara
  • Publication number: 20060108955
    Abstract: Methods and systems for driving a motor are disclosed. A center tap voltage and a desired center tap voltage are used to generate a voltage feedback. A power amplifier receives a reference current and the voltage feedback. The power amplifier provides a phase current to a phase of a motor. The phase current is substantially centered about the desired center tap voltage as a consequence of the voltage feedback. Thus, high-side to low-side or state to state current variations are reduced thereby reducing the occurrence of problems such as torque ripple and back EMF.
    Type: Application
    Filed: April 2, 2003
    Publication date: May 25, 2006
    Inventors: Jonathan Knight, Akihiko Miyanohara
  • Patent number: 6778005
    Abstract: The present invention improves on the topology of a conventional current source by interposing an RC circuit and additional MOS between the output of a buffer and the output of the current source. The topology of the present invention advantageously provides a clean current output by shunting noise to ground.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: August 17, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Futoshi Fujiwara, Akihiko Miyanohara
  • Publication number: 20030169099
    Abstract: The present invention improves on the topology of a conventional current source by interposing an RC circuit and additional MOS between the output of a buffer and the output of the current source. The topology of the present invention advantageously provides a clean current output by shunting noise to ground.
    Type: Application
    Filed: December 27, 2002
    Publication date: September 11, 2003
    Inventors: Futoshi Fujiwara, Akihiko Miyanohara