Patents by Inventor Akihiko Narisawa

Akihiko Narisawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and manufacturing method thereof
    Patent number: 6784554
    Abstract: In a semiconductor device in which an LSI chip comprising electrodes with a 100 &mgr;m pitch or less and 50 or more pins is mounted directly on an organic substrate, a mounting structure and a manufacturing method thereof are provided excellent in the solder resistant reflow property, temperature cycle reliability and high temperature/high humidity reliability of the semiconductor device. Electrode Au bumps of the chip and an Au film at the uppermost surface of connection terminals of the substrate are directly flip-chip bonded by Au/Au metal bonding and the elongation of the bonded portion of the Au bump is 2 &mgr;m or more. The method of obtaining the bonded structure involves a process of supersonically bonding both of the bonding surfaces within 10 min after sputter cleaning, under the bonding conditions selected from room temperature on the side of the substrate, room temperature to 150° C.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: August 31, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Ryoichi Kajiwara, Masahiro Koizumi, Masayoshi Shinoda, Akihiko Narisawa, Asao Nishimura, Toshiaki Morita, Kazuya Takahashi, Kazutoshi Itou
  • Semiconductor device and manufacturing method thereof
    Publication number: 20030127747
    Abstract: In a semiconductor device in which an LSI chip comprising electrodes with a 100 &mgr;m pitch or less and 50 or more pins is mounted directly on an organic substrate, a mounting structure and a manufacturing method thereof are provided excellent in the solder resistant reflow property, temperature cycle reliability and high temperature/high humidity reliability of the semiconductor device. Electrode Au bumps of the chip and an Au film at the uppermost surface of connection terminals of the substrate are directly flip-chip bonded by Au/Au metal bonding and the elongation of the bonded portion of the Au bump is 2 &mgr;m or more. The method of obtaining the bonded structure involves a process of supersonically bonding both of the bonding surfaces within 10 min after sputter cleaning, under the bonding conditions selected from room temperature on the side of the substrate, room temperature to 150° C.
    Type: Application
    Filed: December 18, 2002
    Publication date: July 10, 2003
    Inventors: Ryoichi Kajiwara, Masahiro Koizumi, Masayoshi Shinoda, Akihiko Narisawa, Asao Nishimura, Toshiaki Morita, Kazuya Takahashi, Kazutoshi Itou
  • Semiconductor device and display unit using the semiconductor device and notebook-size personal computer
    Patent number: 5920115
    Abstract: To provide a semiconductor device in which a thin resin film is provided on the whole margin of the principal plane of a semiconductor chip a lead is provided on the thin resin film, the lead is electrically connected with input and output electrode pads of the semiconductor chip, and the electrical joint is covered and sealed with a seal resin.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: July 6, 1999
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Corp.
    Inventors: Makoto Kimura, Shinji Tojo, Takahiro Fujioka, Akihiko Narisawa, Yoshiyuki Tanigawa, Shinya Kanamitsu, Koji Akimoto, Hiroyuki Mouri
  • Semiconductor device and display unit using the semiconductor device and notebook-size personal computer
    Patent number: 5767571
    Abstract: To provide a semiconductor device in which a thin resin film is provided on the whole margin of the principal plane of a semiconductor chip, a lead is provided on the thin resin film, the lead is electrically connected with input and output electrode pads of the semiconductor chip, and the electrical joint is covered and sealed with a seal resin.
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: June 16, 1998
    Assignees: Hitachi, Ltd, Hitachi Device Engineering Corp
    Inventors: Makoto Kimura, Shinji Tojo, Takahiro Fujioka, Akihiko Narisawa, Yoshiyuki Tanigawa, Shinya Kanamitsu, Koji Akimoto, Hiroyuki Mouri