Patents by Inventor Akihiko Nomura

Akihiko Nomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10580732
    Abstract: A semiconductor device includes a semiconductor substrate having a first main surface and a second main surface opposite to the first main surface; a first conductive layer disposed on the second main surface; a second conductive layer passing through the semiconductor substrate from the first main surface to the second main surface so that the second conductive layer is connected to the first conductive layer; an organic insulation film disposed to contact with the first conductive layer; and a first insulation layer disposed to contact with the organic insulation film. The second conductive layer has a first portion passing through the semiconductor substrate so that the first portion contacts with the semiconductor substrate through the organic insulation film and the first insulation layer.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: March 3, 2020
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Akihiko Nomura
  • Patent number: 10580721
    Abstract: A semiconductor device includes a semiconductor substrate having a first main surface and a second main surface opposite to the first main surface; a first conductive layer covering a part of the first main surface; a through electrode connected to the first conductive layer and having a first conductive plated layer and a second conductive plated layer; and a second conductive layer formed on the second main surface. The first conductive plated layer contacts with the semiconductor substrate through a seed layer. The second conductive plated layer is formed on the first conductive plated layer. The second conductive layer is formed of the seed layer, the first conductive plated layer, and the second conductive plated layer. The first conductive plated layer has a first edge surface. The second conductive plated layer has a second edge surface flush with the first edge surface.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: March 3, 2020
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Akihiko Nomura
  • Publication number: 20190080987
    Abstract: A semiconductor device includes a semiconductor substrate having a first main surface and a second main surface opposite to the first main surface; a first conductive layer covering a part of the first main surface; a through electrode connected to the first conductive layer and having a first conductive plated layer and a second conductive plated layer; and a second conductive layer formed on the second main surface. The first conductive plated layer contacts with the semiconductor substrate through a seed layer. The second conductive plated layer is formed on the first conductive plated layer. The second conductive layer is formed of the seed layer, the first conductive plated layer, and the second conductive plated layer. The first conductive plated layer has a first edge surface. The second conductive plated layer has a second edge surface flush with the first edge surface.
    Type: Application
    Filed: November 9, 2018
    Publication date: March 14, 2019
    Inventor: Akihiko NOMURA
  • Patent number: 10153228
    Abstract: A semiconductor device includes a semiconductor substrate. The semiconductor substrate has a first main surface and a second main surface opposite to the first main surface, and includes a first conductive layer formed on the second main surface. A through hole penetrates through the semiconductor substrate from the first main surface to the second main surface, so that the first conductive layer formed on the second main surface is exposed at a bottom portion of the through hole. A seed layer is formed on a side surface of the through hole from the bottom portion of the through hole to the first main surface; a second conductive layer is formed on the seed layer; and a third conductive layer is selectively formed on the second conductive layer.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: December 11, 2018
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Akihiko Nomura
  • Publication number: 20180315705
    Abstract: A semiconductor device includes a semiconductor substrate having a first main surface and a second main surface opposite to the first main surface; a first conductive layer disposed on the second main surface; a second conductive layer passing through the semiconductor substrate from the first main surface to the second main surface so that the second conductive layer is connected to the first conductive layer; an organic insulation film disposed to contact with the first conductive layer; and a first insulation layer disposed to contact with the organic insulation film. The second conductive layer has a first portion passing through the semiconductor substrate so that the first portion contacts with the semiconductor substrate through the organic insulation film and the first insulation layer.
    Type: Application
    Filed: July 5, 2018
    Publication date: November 1, 2018
    Inventor: Akihiko NOMURA
  • Patent number: 10043743
    Abstract: A method of producing a semiconductor device, comprising the steps of forming a through hole in a semiconductor substrate having a first main surface, a second main surface opposite to the first main surface, and a first conductive layer disposed on the second main surface so that the through hole passes through the semiconductor substrate from the first main surface to the second main surface; forming an insulation film to extend from a bottom portion of the through hole to the first main surface through a side surface of the through hole; coating an organic member on the insulation film on the side surface of the through hole and the first main surface; removing an air bubble in the organic member and between the organic member and the insulation film; and forming a first opening portion in the organic member.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: August 7, 2018
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Akihiko Nomura
  • Publication number: 20180151476
    Abstract: A semiconductor device includes a semiconductor substrate. The semiconductor substrate has a first main surface and a second main surface opposite to the first main surface, and includes a first conductive layer formed on the second main surface. A through hole penetrates through the semiconductor substrate from the first main surface to the second main surface, so that the first conductive layer formed on the second main surface is exposed at a bottom portion of the through hole. A seed layer is formed on a side surface of the through hole from the bottom portion of the through hole to the first main surface; a second conductive layer is formed on the seed layer; and a third conductive layer is selectively formed on the second conductive layer.
    Type: Application
    Filed: January 2, 2018
    Publication date: May 31, 2018
    Inventor: Akihiko NOMURA
  • Patent number: 9892995
    Abstract: A semiconductor device includes a semiconductor substrate. The semiconductor substrate has a first main surface and a second main surface opposite to the first main surface, and includes a first conductive layer formed on the second main surface. A through hole penetrates through the semiconductor substrate from the first main surface to the second main surface, so that the first conductive layer formed on the second main surface is exposed at a bottom portion of the through hole. A seed layer is formed on a side surface of the through hole from the bottom portion of the through hole to the first main surface; a second conductive layer is formed on the seed layer; and a third conductive layer is selectively formed on the second conductive layer.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: February 13, 2018
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Akihiko Nomura
  • Publication number: 20170221817
    Abstract: A method of producing a semiconductor device, comprising the steps of forming a through hole in a semiconductor substrate having a first main surface, a second main surface opposite to the first main surface, and a first conductive layer disposed on the second main surface so that the through hole passes through the semiconductor substrate from the first main surface to the second main surface; forming an insulation film to extend from a bottom portion of the through hole to the first main surface through a side surface of the through hole; coating an organic member on the insulation film on the side surface of the through hole and the first main surface; removing an air bubble in the organic member and between the organic member and the insulation film; and forming a first opening portion in the organic member.
    Type: Application
    Filed: April 20, 2017
    Publication date: August 3, 2017
    Inventor: Akihiko NOMURA
  • Patent number: 9659841
    Abstract: A method of producing a semiconductor device, comprising the steps of forming a through hole in a semiconductor substrate having a first main surface, a second main surface opposite to the first main surface, and a first conductive layer disposed on the second main surface so that the through hole passes through the semiconductor substrate from the first main surface to the second main surface; forming an insulation film to extend from a bottom portion of the through hole to the first main surface through a side surface of the through hole; coating an organic member on the insulation film on the side surface of the through hole and the first main surface; removing an air bubble in the organic member and between the organic member and the insulation film; and forming a first opening portion in the organic member.
    Type: Grant
    Filed: October 20, 2014
    Date of Patent: May 23, 2017
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Akihiko Nomura
  • Publication number: 20150348875
    Abstract: A semiconductor device includes a semiconductor substrate. The semiconductor substrate has a first main surface and a second main surface opposite to the first main surface, and includes a first conductive layer formed on the second main surface. A through hole penetrates through the semiconductor substrate from the first main surface to the second main surface, so that the first conductive layer formed on the second main surface is exposed at a bottom portion of the through hole. A seed layer is formed on a side surface of the through hole from the bottom portion of the through hole to the first main surface; a second conductive layer is formed on the seed layer; and a third conductive layer is selectively formed on the second conductive layer.
    Type: Application
    Filed: June 24, 2015
    Publication date: December 3, 2015
    Inventor: Akihiko NOMURA
  • Patent number: 9099536
    Abstract: A method of producing a semiconductor device includes the step of forming a through hole in a semiconductor substrate. The semiconductor substrate has a first main surface and a second main surface opposite to the first main surface, and includes a first conductive layer formed on the second main surface. The through hole penetrates through the semiconductor substrate from the first main surface to the second main surface, so that the first conductive layer formed on the second main surface is exposed at a bottom portion of the through hole. The method further includes the steps of forming a seed layer on a side surface of the through hole from the bottom portion of the through hole to the first main surface; forming a second conductive layer on the seed layer through a first plating process; and forming a third conductive layer selectively on the second conductive layer.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: August 4, 2015
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Akihiko Nomura
  • Publication number: 20150115412
    Abstract: A method of producing a semiconductor device, comprising the steps of forming a through hole in a semiconductor substrate having a first main surface, a second main surface opposite to the first main surface, and a first conductive layer disposed on the second main surface so that the through hole passes through the semiconductor substrate from the first main surface to the second main surface; forming an insulation film to extend from a bottom portion of the through hole to the first main surface through a side surface of the through hole; coating an organic member on the insulation film on the side surface of the through hole and the first main surface; removing an air bubble in the organic member and between the organic member and the insulation film; and forming a first opening portion in the organic member.
    Type: Application
    Filed: October 20, 2014
    Publication date: April 30, 2015
    Inventor: Akihiko NOMURA
  • Publication number: 20130313688
    Abstract: A method of producing a semiconductor device includes the step of forming a through hole in a semiconductor substrate. The semiconductor substrate has a first main surface and a second main surface opposite to the first main surface, and includes a first conductive layer formed on the second main surface. The through hole penetrates through the semiconductor substrate from the first main surface to the second main surface, so that the first conductive layer formed on the second main surface is exposed at a bottom portion of the through hole. The method further includes the steps of forming a seed layer on a side surface of the through hole from the bottom portion of the through hole to the first main surface; forming a second conductive layer on the seed layer through a first plating process; and forming a third conductive layer selectively on the second conductive layer.
    Type: Application
    Filed: May 17, 2013
    Publication date: November 28, 2013
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Akihiko NOMURA
  • Patent number: 8024973
    Abstract: A semiconductor acceleration sensor includes an acceleration sensor chip that includes a weight portion, a base portion provided around the weight portion with a gap therebetween, and beam portions flexibly connecting the weight portion and the base portion; and a stopper plate that is provided above the acceleration sensor chip. The stopper plate includes: a plurality of fixing portions that are protrudingly provided at positions opposite to the base portion and are fixed to the base portion; first concave portions that are formed around the fixing portions at positions opposite to the weight portion and define the displacement of the weight portion; and a second concave portion that is formed at a position opposite to the beam portions and is deeper than the first concave portion.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: September 27, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventors: Akihiko Nomura, Kenji Kato
  • Patent number: 8015875
    Abstract: The sensor device includes a dead-weight portion, a frame portion disposed so as to surround the dead-weight portion, a supporting portion provided at the frame portion via a first insulating layer, a mass portion provided at the dead-weight portion via a second insulating layer, a beam portion connecting the supporting and mass portions, a first concave portion, and a second concave portion, wherein a depth of the first or second concave portion is from 3.3% or more to 5.0% or less of the width of the frame portion.
    Type: Grant
    Filed: March 3, 2008
    Date of Patent: September 13, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Akihiko Nomura
  • Publication number: 20110215067
    Abstract: An integrally micromachined acceleration sensor has a mass with a surface facing a stopper. At least one protrusion projects from this surface toward the stopper. In the absence of acceleration, the protrusion is spaced apart from the stopper, but by limiting motion of the mass toward the stopper, the protrusion improves the shock resistance of the acceleration sensor. The protrusion also prevents the mass from sticking to the stopper during the fabrication process. The stopper may have a pattern of holes surrounding the protrusion, so that the protrusion is produced naturally during the wet etching process that separates the mass from the stopper. The holes also shorten the wet etching time.
    Type: Application
    Filed: May 20, 2011
    Publication date: September 8, 2011
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventor: Akihiko NOMURA
  • Publication number: 20090241670
    Abstract: A semiconductor acceleration sensor includes an acceleration sensor chip that includes a weight portion, a base portion provided around the weight portion with a gap therebetween, and beam portions flexibly connecting the weight portion and the base portion; and a stopper plate that is provided above the acceleration sensor chip. The stopper plate includes: a plurality of fixing portions that are protrudingly provided at positions opposite to the base portion and are fixed to the base portion; first concave portions that are formed around the fixing portions at positions opposite to the weight portion and define the displacement of the weight portion; and a second concave portion that is formed at a position opposite to the beam portions and is deeper than the first concave portion.
    Type: Application
    Filed: March 11, 2009
    Publication date: October 1, 2009
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventors: Akihiko Nomura, Kenji Kato
  • Publication number: 20090241671
    Abstract: An acceleration sensor includes a weight portion; a frame portion disposed around the weight portion and away from the weight portion; a beam portion connecting the weight portion and the frame portion; and a stopper portion having a displacement restricting portion for restricting the weight portion from moving upwardly in a vertical direction and a flexible portion connected to the displacement restricting portion and away from the weight portion, the frame portion, and the beam portion.
    Type: Application
    Filed: March 5, 2009
    Publication date: October 1, 2009
    Inventor: Akihiko Nomura
  • Publication number: 20080216574
    Abstract: The sensor device includes a dead-weight portion, a frame portion disposed so as to surround the dead-weight portion, a supporting portion provided at the frame portion via a first insulating layer, a mass portion provided at the dead-weight portion via a second insulating layer, a beam portion connecting the supporting and mass portions, a first concave portion, and a second concave portion, wherein a depth of the first or second concave portion is from 3.3% or more to 5.0% or less of the width of the frame portion.
    Type: Application
    Filed: March 3, 2008
    Publication date: September 11, 2008
    Applicant: OKI ELECTRIC INDUSTRY CO., LTD.
    Inventor: Akihiko Nomura