Abstract: The present invention is to provide a small-sized dryness/wetness responsive sensor that detects a galvanic current with a high sensitivity as a principle of operation. According to one embodiment of the present invention, a dryness/wetness responsive sensor comprises a thin wire made of a first metal and a thin wire made of a second metal, the second metal is different from the first metal, the thin wire of the first metal and the thin wire of the second metal are disposed in juxtaposition with each other on an insulating substrate, and a surface state of a part between the thin wire of the first metal and the thin wire of the second metal is hydrophilic or hydrophobic.

Abstract: The present invention is to provide a small-sized dryness/wetness responsive sensor that detects a galvanic current with a high sensitivity as a principle of operation. According to one embodiment of the present invention, a dryness/wetness responsive sensor comprises a thin wire made of a first metal and a thin wire made of a second metal, the second metal is different from the first metal, the thin wire of the first metal and the thin wire of the second metal are disposed in juxtaposition with each other on an insulating substrate, and a surface state of a part between the thin wire of the first metal and the thin wire of the second metal is hydrophilic or hydrophobic.

Abstract: The present invention improves the sensitivity and the responsiveness of a dryness/wetness responsive sensor utilizing a galvanic current, allowing for downsizing of the dryness/wetness responsive sensor. Instead of the conventional structure in which an anode electrode and a cathode electrode are stacked with an intervening insulator, the present invention employs a structure in which both electrodes run in juxtaposition with each other on an insulating substrate in the form of, for example, a comb-shaped electrode as shown in the drawing. By utilizing a semiconductor manufacturing process or any other micro/nano-fabrication technology, an inter-electrode distance can be extremely shortened as compared with the conventional sensors, allowing enhancing the sensitivity per unit footprint of the electrodes. Accordingly, a decrease in the size of the dryness/wetness responsive sensor can be easily achieved.

Abstract: A dryness/wetness responsive sensor having decreased size, and improved sensitivity and responsiveness. The present invention comprises a thin wire of a first metal and a thin wire of a second metal, which is different from the first metal, wherein the thin wires run in juxtaposition with each other on an insulating substrate, and wherein the spacing between the first thin wire and the second thin wire is in the range of 5 nm or more and less than 20 ?m.

Abstract: A mask used to form an n+ source layer (11) is formed by a nitride film on the surface of a substrate before a trench (7) is formed. At this time, a sufficient width of the n+ source layer (11) on the surface of the substrate is secured. Thereby, stable contact between the n+ source layer (11) and a source electrode (15) is obtained. A CVD oxide film (12) that is an interlayer insulating film having a thickness of 0.1 micrometer or more and 0.3 micrometer or less is formed on doped poly-silicon to be used as a gate electrode (10a) embedded in the trench (7), and non-doped poly-silicon (13) that is not oxidized is formed on the CVD oxide film (12). Thereby, generation of void in the CVD oxide film (12) is suppressed and, by not oxidizing the non-doped poly-silicon (13), a semiconductor apparatus is easily manufactured.

Abstract: The present invention improves the sensitivity and the responsiveness of a dryness/wetness responsive sensor utilizing a galvanic current, allowing for downsizing of the dryness/wetness responsive sensor. Instead of the conventional structure in which an anode electrode and a cathode electrode are stacked with an intervening insulator, the present invention employs a structure in which both electrodes run in juxtaposition with each other on an insulating substrate in the form of, for example, a comb-shaped electrode as shown in the drawing. By utilizing a semiconductor manufacturing process or any other micro/nano-fabrication technology, an inter-electrode distance can be extremely shortened as compared with the conventional sensors, allowing enhancing the sensitivity per unit footprint of the electrodes. Accordingly, a decrease in the size of the dryness/wetness responsive sensor can be easily achieved.

Abstract: A mask used to form an n+ source layer (11) is formed by a nitride film on the surface of a substrate before a trench (7) is formed. At this time, a sufficient width of the n+ source layer (11) on the surface of the substrate is secured. Thereby, stable contact between the n+ source layer (11) and a source electrode (15) is obtained. A CVD oxide film (12) that is an interlayer insulating film having a thickness of 0.1 micrometer or more and 0.3 micrometer or less is formed on doped poly-silicon to be used as a gate electrode (10a) embedded in the trench (7), and non-doped poly-silicon (13) that is not oxidized is formed on the CVD oxide film (12). Thereby, generation of void in the CVD oxide film (12) is suppressed and, by not oxidizing the non-doped poly-silicon (13), a semiconductor apparatus is easily manufactured.

Abstract: A mask used to form an n+ source layer (11) is formed by a nitride film on the surface of a substrate before a trench (7) is formed. At this time, a sufficient width of the n+ source layer (11) on the surface of the substrate is secured. Thereby, stable contact between the n+ source layer (11) and a source electrode (15) is obtained. A CVD oxide film (12) that is an interlayer insulating film having a thickness of 0.1 micrometer or more and 0.3 micrometer or less is formed on doped poly-silicon to be used as a gate electrode (10a) embedded in the trench (7), and non-doped poly-silicon (13) that is not oxidized is formed on the CVD oxide film (12). Thereby, generation of void in the CVD oxide film (12) is suppressed and, by not oxidizing the non-doped poly-silicon (13), a semiconductor apparatus is easily manufactured.

Abstract: A fault position analysis method and a fault position analysis device for a semiconductor device, through which a fault position of a SiC semiconductor device can be analyzed and specified by an OBIRCH method, are disclosed. The fault position analysis method for the semiconductor device scans and irradiates a device and a circuit on a front surface of a substrate with a laser beam from a rear surface side of the substrate of the semiconductor device to heat the device and the circuit. It causes a current to flow to the device and the circuit while being heated, detects a change in a resistance value caused by a change in a current, and analyzes the fault position. The semiconductor device is a semiconductor device which uses an N-doped SiC substrate. Laser beams having wavelengths of 650 to 810 nm are used.

Abstract: A method of manufacturing a super-junction semiconductor device facilitates increasing the epitaxial growth rate without increasing the manufacturing steps greatly. In substitution for the formation of alignment mark in the surfaces of the second and subsequent non-doped epitaxial layers, patterning for forming a new alignment mark is conducted simultaneously with the resist pattering for selective ion-implantation into the second and subsequent non-doped epitaxial layers in order to form the new alignment mark at a position different from the position, at which the initial alignment mark is formed, and to form the new alignment mark in every one or more repeated epitaxial layer growth cycles.

Abstract: A mask used to form an n+ source layer (11) is formed by a nitride film on the surface of a substrate before a trench (7) is formed. At this time, a sufficient width of the n+ source layer (11) on the surface of the substrate is secured. Thereby, stable contact between the n+ source layer (11) and a source electrode (15) is obtained. A CVD oxide film (12) that is an interlayer insulating film having a thickness of 0.1 micrometer or more and 0.3 micrometer or less is formed on doped poly-silicon to be used as a gate electrode (10a) embedded in the trench (7), and non-doped poly-silicon (13) that is not oxidized is formed on the CVD oxide film (12). Thereby, generation of void in the CVD oxide film (12) is suppressed and, by not oxidizing the non-doped poly-silicon (13), a semiconductor apparatus is easily manufactured.

Abstract: A method of manufacturing a super-junction semiconductor device facilitates increasing the epitaxial growth rate without increasing the manufacturing steps greatly. In substitution for the formation of alignment mark in the surfaces of the second and subsequent non-doped epitaxial layers, patterning for forming a new alignment mark is conducted simultaneously with the resist pattering for selective ion-implantation into the second and subsequent non-doped epitaxial layers in order to form the new alignment mark at a position different from the position, at which the initial alignment mark is formed, and to form the new alignment mark in every one or more repeated epitaxial layer growth cycles.

Abstract: In the method for manufacturing a semiconductor device according to the invention including the step of forming trenches having the depth thereof in perpendicular to the major surface of a semiconductor substrate, the step of forming trenches includes the steps of performing trench etching using an insulator film, formed on the major surface of the semiconductor substrate and shaped with a predetermined pattern, for a mask to form the trenches; etching the inside of the trenches using a halogen containing gas to smoothen the inside of the trenches; and thermally treating in a non-oxidizing and non-nitriding atmosphere. The manufacturing method according to the invention facilitates well removing the etching residues remaining in the trenches and rounding the trench corners properly when the trenches are 2 ?m or narrower in width and even when the trenches are 1 ?m or narrower in width.

Abstract: In the method for manufacturing a semiconductor device according to the invention including the step of forming trenches having the depth thereof in perpendicular to the major surface of a semiconductor substrate, the step of forming trenches includes the steps of performing trench etching using an insulator film, formed on the major surface of the semiconductor substrate and shaped with a predetermined pattern, for a mask to form the trenches; etching the inside of the trenches using a halogen containing gas to smoothen the inside of the trenches; and thermally treating in a non-oxidizing and non-nitriding atmosphere. The manufacturing method according to the invention facilitates well removing the etching residues remaining in the trenches and rounding the trench corners properly when the trenches are 2 ?m or narrower in width and even when the trenches are 1 ?m or narrower in width.

Abstract: A superconducting transistor having a source region and a drain region are formed by a YBCO film on a barrier layer, which is composed of a PBCO film formed on an STO substrate. A gate electrode is disposed on the thinner wall at the back of the STO substrate. In a superconducting transistor so constructed the electric field created by the gate voltage works effectively at an interface with the barrier layer, more carriers can be drawn out relative to the applied gate voltage, and it becomes possible for a large superconduction current to flow.

Abstract: A superconducting transistor with superior withstand voltage having source region and a drain region formed of oxide superconductors 3, a PrBa.sub.2 Cu.sub.3 O.sub.7-x layer 2 or an ScBa.sub.2 Cu.sub.3 O.sub.7-x layer 2 forming an intermediate region sandwiched by the source and drain regions. The regions are disposed on a substrate 1. An insulation layer 4 is disposed on the intermediate region. A transistor uses the intermediate region as an insulator when the gate is turned off, and as a superconductor when the gate is turned on.

Abstract: A nitrogen oxides-containing gas is contacted with a solid catalyst in the presence of methyl tert-butyl ether as a reducing agent for the conversion of the nitrogen oxides into molecular nitrogen. A supported catalyst including an alumina carrier having Pt, Rh or Ru supported thereon is desirably used as the solid catalyst.

Abstract: An exhaust gas cleaner comprising a catalyst carried on a heat-resistant ter, the catalyst comprising (a) one or more alkali metals, (b) one or more metals selected from the group consisting of Zn, Sn and transition metals excluding platinum-group metals, and (c) one or more rare earth metals, and a method of cleaning an exhaust gas with it. Alkali metals may be added to a fuel.

Abstract: An exhaust gas cleaner comprising (a) at least one filter made of a heat-resistant and electrically insulating material for trapping floating fine particles in an exhaust gas; and (b) at least a pair of electrodes stacked with the filter alternately, voltage being applied between the adjacent electrodes to burn electrically conductive and burnable fine particles trapped in the filter by heat generated by a current flowing between the adjacent electrodes, and the direction of the flow of the exhaust gas in the filter being essentially parallel to that of the laminate surface of the electrodes. The filter may carry a catalyst which functions to reduce harmful gas components in the exhaust gas.