Abstract: A projector includes a light output device outputting detection light on a screen, a position detection unit detecting an indication position, and a calibration control unit. The position detection unit performs a first detecting operation detecting an indication position by using the detection light, and a second detecting operation detecting an indication position by using light other than the detection light. The calibration control unit executes calibration associating a position detected in the second detecting operation with a position on the screen, and restricts output of the detection light while the calibration is executed.

Abstract: A projector includes: a frame image storage unit that stores input image data input to the projector; a block image storage unit that stores a part of the input image data in terms of block image data including N×M (where N and M?2) pixels; a correction processing unit that performs a correction process of correcting a distortion of the image projected onto the projection plane to generate corrected image data which is image data after correction on the basis of the block image data stored in the block image storage unit; and a block image predicting unit that, while the correction processing unit performs the correction process on a predetermined pixel, predicts the block image data necessary for the correction process on a pixel to be processed after the predetermined pixel.

Abstract: A projector includes a projection section adapted to project a projection image on a projection surface, an imaging section adapted to generate a shot image obtained by shooting a range including the projection image projected by the projection section, a detection section adapted to detect a motion of the projector, and an execution section adapted to execute a predetermined process with respect to a calibration for making a correspondence between a coordinate system of the projection image and a coordinate system of the shot image in a case in which the detection section detects the motion of the projector.

Abstract: An image processing device includes: a transformation ratio calculation unit which calculates transformation ratio of an image after transformation, the image after transformation being obtained by transforming an original image under predetermined rule; a filter coefficient calculation unit which calculates filter coefficients based on the transformation ratio; and a pixel value calculation unit which calculates the pixel value of each pixel in the image after transformation using the filter coefficients and outputs the pixel value of the image after transformation as image data after transformation.

Abstract: A projector detects a first input operation and a second input operation using an operation detection section, detects an operation position of the input operation in an operation area in which the input operation can be detected, and notifies the first operation and the operation position when the second operation is not detected within a predetermined time from when the first input operation is detected.

Abstract: A projector includes a light modulation section provided with a plurality of pixels arranged, and adapted to modulate light from a light source by the pixel, and when executing a keystone distortion correction on an image to be projected on a projection surface in response to an operation of an operation section, a maximum pixel area, which is a maximum area in which an image of the light modulation section is formed, and an image forming area in which the image to be the object of the keystone distortion correction is formed are projected simultaneously on the projection surface.

Abstract: A projector includes a deformation ratio calculating unit that calculates a first deformation ratio on a reference point set in a first image when performing a correction process with respect to a first image data, a deformation ratio determination unit that determines a second deformation ratio of the first image based on the first deformation ratio calculated by the deformation ratio calculation unit, a synthesis image generation unit that generates synthesis image data indicating a synthesis image which is generated by synthesizing a second image indicated by second image data and the first image with a size changed based on the second deformation ratio, a correction unit that performs a correction process with respect to the synthesis image data, and a projection unit that projects the synthesis image based on the synthesis image data which is subjected to the correction process.

Abstract: A projector adapted to correct a keystone distortion of an image, includes a frame memory adapted to store a pre-correction image, a block data storage memory adapted to store the pre-correction image by block data that composed of M pixels in a first direction and N pixels in a second direction (M, N?2), a correction section adapted to correct the pre-correction image based on the block data stored in the block data storage memory, and a control section adapted to perform control of obtaining the pre-correction image from the frame memory by the block data, and storing the obtained pre-correction image in the block data storage memory, and the control section obtains contiguous n×N (n?2) lines of the image from the frame memory and stores the obtained image in the block data storage memory at the beginning of the correction process.

Abstract: A projector includes: a frame image storage unit that stores input image data input to the projector; a block image storage unit that stores a part of the input image data in terms of block image data including N×M (where N and M?2) pixels; a correction processing unit that performs a correction process of correcting a distortion of the image projected onto the projection plane to generate corrected image data which is image data after correction on the basis of the block image data stored in the block image storage unit; and a block image predicting unit that, while the correction processing unit performs the correction process on a predetermined pixel, predicts the block image data necessary for the correction process on a pixel to be processed after the predetermined pixel.

Abstract: To provide a processor capable of achieving high processing efficiency by performing the exclusive control between task processing and interrupt handling properly even in a multiprocessor. An interrupt processor that includes a plurality of unit processors, in which at least of the plurality of unit processors is capable of performing interrupt handling requested from the outside is configured such that the unit processor P1 of the unit processors P0 to P3 comprises an purge inhibit flag 106 for causing the unit processor P1 to enter a lock state where the purge of the task is being inhibited, a hardware semaphore unit 13 for inhibiting other unit processors from accessing a predetermined region in memory accessed by the unit processor P1 after the unit processor P1 is brought into the lock state, and an interrupt control unit 11 for inhibiting the interrupt processor from performing the interrupt handling during the execution of exclusive control.

Abstract: An image processing device includes: a transformation ratio calculation unit which calculates transformation ratio of an image after transformation, the image after transformation being obtained by transforming an original image under predetermined rule; a filter coefficient calculation unit which calculates filter coefficients based on the transformation ratio; and a pixel value calculation unit which calculates the pixel value of each pixel in the image after transformation using the filter coefficients and outputs the pixel value of the image after transformation as image data after transformation.

Abstract: A projector adapted to correct a keystone distortion of an image, includes a frame memory adapted to store a pre-correction image, a block data storage memory adapted to store the precorrection image by block data that composed of M pixels in a first direction and N pixels in a second direction (M, N?2), a correction section adapted to correct the pre-correction image based on the block data stored in the block data storage memory, and a control section adapted to perform control of obtaining the pre-correction image from the frame memory by the block data, and storing the obtained pre-correction image in the block data storage memory, and the control section obtains contiguous n×N (n?2) lines of the image from the frame memory and stores the obtained image in the block data storage memory at the beginning of the correction process.

Abstract: The present invention provides a method for reusing a delaminated wafer, which is a method for applying reprocessing that is at least polishing to a delaminated wafer 17 byproduced when manufacturing an SOI wafer based on an ion implantation delamination method and thereby again reusing the delaminated wafer 17 as a bond wafer 21 in an SOI wafer manufacturing process, wherein, at least, a CZ wafer 11 used as the bond wafer is a low-defect wafer whose entire surface is formed of an N region, and an RTA treatment is carried out in the reprocessing with respect to the delaminated wafer 17 at a higher temperature than a temperature in formation of a thermal oxide film 12 performed with respect to the bond wafer in the SOI wafer manufacturing process.

Abstract: A projector includes a light modulation section provided with a plurality of pixels arranged, and adapted to modulate light from a light source by the pixel, and when executing a keystone distortion correction on an image to be projected on a projection surface in response to an operation of an operation section, a maximum pixel area, which is a maximum area in which an image of the light modulation section is formed, and an image forming area in which the image to be the object of the keystone distortion correction is formed are projected simultaneously on the projection surface.

Abstract: To provide a processor capable of achieving high processing efficiency by performing the exclusive control between task processing and interrupt handling properly even in a multiprocessor. An interrupt processor that includes a plurality of unit processors, in which at least of the plurality of unit processors is capable of performing interrupt handling requested from the outside is configured such that the unit processor P1 of the unit processors P0 to P3 comprises an purge inhibit flag 106 for causing the unit processor P1 to enter a lock state where the purge of the task is being inhibited, a hardware semaphore unit 13 for inhibiting other unit processors from accessing a predetermined region in memory accessed by the unit processor P1 after the unit processor P1 is brought into the lock state, and an interrupt control unit 11 for inhibiting the interrupt processor from performing the interrupt handling during the execution of exclusive control.

Abstract: A video compositing device includes: a first video input unit configured to input a first video; a second video input unit configured to input a second video; a parameter input unit configured to input a parameter indicating a relative positional relationship between the first video input by the first video input unit and the second video input by the second video input unit when the first and second videos are composited; a video compositing unit configured to composite the first and second videos, in units of pixels, in accordance with the parameter input by the parameter input unit, to generate a composite video; and an output unit configured to output a composite video generated by the video compositing unit.

Abstract: A processor includes a plurality of processor sections that process a task or a thread and a high priority processing control section that controls execution of a high priority processing that was input, wherein the high priority processing control section causes a processor section that is not executing processing of a task or a thread or a processor section that is executing processing of a task or a thread of the lowest priority among the plurality of processor sections to execute the high priority processing that was input.

Abstract: A processor comprises a plurality of processor sections that process a task or a thread, wherein the processor includes a dedicated processor section that exclusively processes a predetermined high priority processing, a general-purpose processor section that performs processing other than the predetermined high priority processing and a high priority processing control section that causes the dedicated processor section to process the predetermined high priority processing.

Abstract: An inkjet recording head for ejecting ink, having a plurality of piezoelectric sidewalls to form a plurality of ink channels; a piezoelectric bottom plate; and a plurality of electrodes All of the ink channels are divided into two or more groups of ink channels composed of ink channels between which at least one ink channel is sandwiched; wherein an ink ejection operation is performed successively in a time-sharing mode for each of the group of ink channels, while satisfying the condition of |CTC+CTE|?10 (%); where a crosstalk between ink channels in one group due to a compliance ratio of the sidewalls to the ink in the ink channel is CTC; and a crosstalk between ink channels in one group due to a leak of electric field caused by electric voltage applied to the electrodes is CTE.

Abstract: An inkjet recording head for ejecting ink, having a plurality of piezoelectric sidewalls to form a plurality of ink channels; a piezoelectric bottom plate; and a plurality of electrodes All of the ink channels are divided into two or more groups of ink channels composed of ink channels between which at least one ink channel is sandwiched;