Patents by Inventor Akihiko Yasuoka

Akihiko Yasuoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4217153
    Abstract: In the manufacture of a field-effect transistor, a silicon nitride film (underlaid with a thin silicon oxide film) is selectively formed on those parts of a semiconductor substrate of a first conductivity type at which a gate region and source and drain electrodes are to be formed, the formation of the source and drain regions and subsequently the formation of a selective thermal oxidation film on the source and drain regions are carried out by employing the silicon nitride film as a mask, and thereafter, the silicon nitride film is removed and the contacts are selectively formed at the exposed parts.Further, this invention extends to the manufacture of a C-MOS integrated circuit device which exploits the SOP (Selective oxidation process) technique employing an oxidation-proof film.
    Type: Grant
    Filed: March 31, 1978
    Date of Patent: August 12, 1980
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shinobu Fukunaga, Akihiko Yasuoka
  • Patent number: 4084311
    Abstract: A process for preparing a complementary MOS integrated circuit by forming a shallow first source-drain region near the gate; determining simultaneously the contact holes in the source-drain regions of both of the P-channel and N-channel transistors; forming a deep second source-drain region from the contact holes using thermal diffusion; and forming the electrodes at the contact holes.
    Type: Grant
    Filed: October 15, 1976
    Date of Patent: April 18, 1978
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akihiko Yasuoka, Hiroshi Shibata