Patents by Inventor Akihiro Kenmotsu
Akihiro Kenmotsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10242611Abstract: A display panel includes a plurality of scan lines that receive scan signals, a plurality of data lines that receive data signals, lines that receive masking signals according to the scan signals, and a plurality of pixels respectively connected to the plurality of scan lines and the plurality of data lines. The error detection circuit receives the scan signals that are transmitted through the plurality of scan lines, and outputs an error detection signal based on the scan signals. Power is not supplied to the plurality of pixels when the error detection signal is at an activated level.Type: GrantFiled: March 24, 2017Date of Patent: March 26, 2019Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Akihiro Kenmotsu, Junghak Kim, Juneyoung Song
-
Publication number: 20170309209Abstract: A display panel includes a plurality of scan lines that receive scan signals, a plurality of data lines that receive data signals, lines that receive masking signals according to the scan signals, and a plurality of pixels respectively connected to the plurality of scan lines and the plurality of data lines. The error detection circuit receives the scan signals that are transmitted through the plurality of scan lines, and outputs an error detection signal based on the scan signals. Power is not supplied to the plurality of pixels when the error detection signal is at an activated level.Type: ApplicationFiled: March 24, 2017Publication date: October 26, 2017Inventors: Akihiro KENMOTSU, Junghak KIM, Juneyoung SONG
-
Patent number: 5981973Abstract: A thin film transistor structure for use in driving liquid crystal display elements has a semiconductor active layer, a control electrode layer underlying the active layer with an insulating layer interposed therebetween and first and second main electrode layers formed on or above the active layer in a spaced relation with each other to define a channel in the active layer in cooperation with the control electrode layer between the main electrode layers. The active layer has a first peripheral edge portion generally perpendicular to the direction of the channel and a second peripheral edge portion generally not perpendicular to the direction of the channel. The first and/or second main electrode layer extends over the first and/or second peripheral edge portion of the active layer such that at least a part of the first peripheral edge portion and/or at least part of the second peripheral edge portion of the active layer has its side face directly covered with the main electrode layer.Type: GrantFiled: November 17, 1997Date of Patent: November 9, 1999Assignee: Hitachi, Ltd.Inventors: Eiji Matsuzaki, Akihiro Kenmotsu, Yoshifumi Yoritomi, Toshiyuki Koshita, Takao Takano, Mitsuo Nakatani
-
Patent number: 5821565Abstract: A thin film transistor structure for use in driving liquid crystal display elements has a semiconductor active layer, a control electrode layer underlying the active layer with an insulating layer interposed therebetween and first and second main electrode layers formed on or above the active layer in a spaced relation with each other to define a channel in the active layer in cooperation with the control electrode layer between the main electrode layers. The active layer has a first peripheral edge portion generally perpendicular to the direction of the channel and a second peripheral edge portion generally not perpendicular to the direction of the channel. The first and/or second main electrode layer extends over the first and/or second peripheral edge portion of the active layer such that at least a part of the first peripheral edge portion and/or at least part of the second peripheral edge portion of the active layer has its side face directly covered with the main electrode layer.Type: GrantFiled: December 15, 1995Date of Patent: October 13, 1998Assignee: Hitachi, Ltd.Inventors: Eiji Matsuzaki, Akihiro Kenmotsu, Yoshifumi Yoritomi, Toshiyuki Koshita, Takao Takano, Mitsuo Nakatani
-
Patent number: 5493129Abstract: A thin film transistor structure for use in driving liquid crystal display elements has a semiconductor active layer, a control electrode layer underlying the active layer with an insulating layer interposed therebetween and first and second main electrode layers formed on or above the active layer in a spaced relation with each other to define a channel in the active layer in cooperation with the control electrode layer between the main electrode layers. The active layer has a first peripheral edge portion generally perpendicular to the direction of the channel and a second peripheral edge portion generally not perpendicular to the direction of the channel. The first and/or second main electrode layer extends over the first and/or second peripheral edge portion of the active layer such that at least a part of the first peripheral edge portion and/or at least part of the second peripheral edge portion of the active layer has its side face directly covered with the main electrode layer.Type: GrantFiled: June 27, 1989Date of Patent: February 20, 1996Assignee: Hitachi, Ltd.Inventors: Eiji Matsuzaki, Akihiro Kenmotsu, Yoshifumi Yoritomi, Toshiyuki Koshita, Takao Takano, Mitsuo Nakatani
-
Patent number: 5320729Abstract: Disclosed herein is a sputtering target with which a high resistivity thin film consisting of chromium, silicon and oxygen can be produced economically and stably for a long time. Also disclosed is a process for producing the sputtering target by selecting the grain size of a chromium (Cr) powder and a silicon dioxide (SiO.sub.2) powder, drying the powders sufficiently by heating, then mixing the dried powders to obtain a mixed powder containing generally from 20 to 80% by weight of chromium, most preferably from 50 to 80% by weight of chromium, the remainder being silicon dioxide, packing the mixed powder in a die, and sintering the packed powder by hot pressing or the like, to produce a desired sputtering target which has a two phase mixed structure. The sputtering target can be used for manufacture of thin film resistors and electric circuits.Type: GrantFiled: July 17, 1992Date of Patent: June 14, 1994Assignee: Hitachi, Ltd.Inventors: Yasunori Narizuka, Masakazu Ishino, Akihiro Kenmotsu, Yoshitaka Chiba, Akitoshi Hiraki
-
Patent number: 5157470Abstract: Disclosed are a thin film transistor comprising a first electrode pattern formed on an insulating substrate as a gate electrode, a first insulating film formed as a gate insulating film and covering at least the electrode pattern, a semiconductor thin film pattern mainly composed of silicon formed on the insulating film, the semiconductor thin film pattern overlapping the first electrode pattern and the existing region thereof being limited, second and third electrodes formed on the semiconductor thin film pattern as a drain electrode and a source electrode, the second and third electrodes covering a portion of the semiconductor thin film pattern and being spaced apart each other, and a thin film containing silicon oxide formed over the semiconductor film, the second and third electrodes being formed upon the silicon oxide film, a method of manufacturing the thin film transistor, an active matrix circuit board using the thin film transistors, and an image display device using the active matrix circuit board.Type: GrantFiled: May 21, 1991Date of Patent: October 20, 1992Assignee: Hitachi, Ltd.Inventors: Eiji Matsuzaki, Takao Takano, Toshiyuki Koshita, Yoshifumi Yoritomi, Akihiro Kenmotsu
-
Patent number: 4902394Abstract: A sputtering method and apparatus for use in forming thin films on a substrate. The power output of a sputtering power source is periodically changed to a high level power and a low level power, and each film is deposited to a thickness corresponding to the integrated value of the high level power, whereby a desired thickness can be obtained in any of multilayer films having mutually different film thickness ratios.Type: GrantFiled: January 20, 1988Date of Patent: February 20, 1990Assignee: Hitachi, Ltd.Inventors: Akihiro Kenmotsu, Shigeru Kobayashi, Kunihiko Watanabe, Eiji Matsuzaki, Yoshifumi Yoritomi, Toshiyuki Koshita, Mitsuo Nakatani
-
Patent number: 4736012Abstract: A semiconductor device containing an .alpha.-rays shielding resin layer on at least active portion of a semiconductor element, said .alpha.-rays shielding resin being a special polyimide resin, is excellent in thermal resistance at the time of sealing the semiconductor element, adhesion of the .alpha.-rays shielding layer to the semiconductor element, and .alpha.-rays shielding ability.Type: GrantFiled: June 29, 1984Date of Patent: April 5, 1988Assignee: Hitachi, Ltd.Inventors: Fusaji Shoji, Akihiro Kenmotsu, Isao Obara, Hitoshi Yokono, Takeshi Komaru