Abstract: A memory system includes a memory controller and a first memory. The memory controller writes a plurality of first data segments of user data and metadata to a plurality of first segment regions of the first memory according to a first order. In response to a read request from a host, the memory controller individually identifies a plurality of second segment regions to which a plurality of second data segments corresponding to requested user data has been written. The memory controller determines whether or not to perform a prefetch operation according to a second order and a third order. The second order is an order of reading the second data segments from the second segment regions. The third order corresponds to the first order excluding the order of write destinations of the metadata.

Abstract: A memory system includes a memory controller and a first memory. The memory controller writes a plurality of first data segments of user data and metadata to a plurality of first segment regions of the first memory according to a first order. In response to a read request from a host, the memory controller individually identifies a plurality of second segment regions to which a plurality of second data segments corresponding to requested user data has been written. The memory controller determines whether or not to perform a prefetch operation according to a second order and a third order. The second order is an order of reading the second data segments from the second segment regions. The third order corresponds to the first order excluding the order of write destinations of the metadata.

Abstract: According to one embodiment, a controller executes a first operation. The first operation includes reading a plurality of data units from a nonvolatile memory and executing a process on the read plurality of data units. The process includes an inverse conversion of a conversion applied to the plurality of data units and first decoding using the plurality of data units that has executed the inverse conversion. The controller acquires first information from one of the plurality of data units that has executed the first operation. The controller compares the acquired first information with an expected value of the first information and re-executes the first operation when the acquired first information and the expected value are not equal to each other.

Abstract: According to one embodiment, a controller executes a first operation. The first operation includes reading a plurality of data units from a nonvolatile memory and executing a process on the read plurality of data units. The process includes an inverse conversion of a conversion applied to the plurality of data units and first decoding using the plurality of data units that has executed the inverse conversion. The controller acquires first information from one of the plurality of data units that has executed the first operation. The controller compares the acquired first information with an expected value of the first information and re-executes the first operation when the acquired first information and the expected value are not equal to each other.

Abstract: According to one embodiment, a memory system includes a first memory including a message queue having first to nth addresses (n?2, n is natural number), a first pointer showing one of the first to nth addresses, and a second pointer showing one of the first to nth addresses, a monitor unit which detects whether the first and second pointers show the first address, and a processing unit which changes an address shown by the first pointer from the first address to an ith address (n?i?2, i is natural number) when the first and second pointers show the first address. An address shown by the second pointer is incremented from the first address to a (j+1)th address (j?1, j is natural number) when first to jth messages are queued in the first to jth addresses.

Abstract: The present invention relates to a method of operating an electric arc furnace containing (a) a furnace shell having a tapping hole and/or a slag door, (b) a furnace roof having a plurality of electrodes provided so as to face downwards, and (c) a rotating apparatus that rotates the furnace shell around a vertical axis relative to the electrodes, the method contains a rotating step of rotating the furnace shell relative to the electrodes during melting of a metal material, and a holding step of stopping the rotation when any one of the plurality of electrodes reaches a holding position that is previously set close to the tapping hole or the slag door, and holding the furnace shell at the holding position.

Abstract: According to one embodiment, a memory system includes a first memory including a message queue having first to nth addresses (n?2, n is natural number), a first pointer showing one of the first to nth addresses, and a second pointer showing one of the first to nth addresses, a monitor unit which detects whether the first and second pointers show the first address, and a processing unit which changes an address shown by the first pointer from the first address to an ith address (n?i?2, i is natural number) when the first and second pointers show the first address. An address shown by the second pointer is incremented from the first address to a (j+1)th address (j?1, j is natural number) when first to jth messages are queued in the first to jth addresses.

Abstract: The present invention relates to a method of operating an electric arc furnace containing (a) a furnace shell having a tapping hole and/or a slag door, (b) a furnace roof having a plurality of electrodes provided so as to face downwards, and (c) a rotating apparatus that rotates the furnace shell around a vertical axis relative to the electrodes, the method contains a rotating step of rotating the furnace shell relative to the electrodes during melting of a metal material, and a holding step of stopping the rotation when any one of the plurality of electrodes reaches a holding position that is previously set close to the tapping hole or the slag door, and holding the furnace shell at the holding position.

Abstract: Provided is an arc furnace, including: a furnace body having a bottomed cylindrical shape; a furnace lid that openably closes an opening of the furnace body; an electrode that is provided at the furnace lid and melts a metal material supplied into the furnace body by electric discharge; a tilting floor that is tiltable within a plane substantially perpendicular to the tilting floor; and a rotation mechanism that is provided on the tilting floor inward from an outer circumference of the furnace body to support a bottom wall of the furnace body, and rotates the furnace body around a cylinder axis thereof.

Abstract: Provided is an arc furnace, including: a furnace body having a bottomed cylindrical shape; a furnace lid that openably closes an opening of the furnace body; an electrode that is provided at the furnace lid and melts a metal material supplied into the furnace body by electric discharge; a tilting floor that is tiltable within a plane substantially perpendicular to the tilting floor; and a rotation mechanism that is provided on the tilting floor inward from an outer circumference of the furnace body to support a bottom wall of the furnace body, and rotates the furnace body around a cylinder axis thereof.

Abstract: In a protection circuit for protecting semiconductor integrated circuit devices from an electrostatic breakdown or a latch-up due to an external surge, etc, a drain terminal of a PMOS transistor MP1, having a source terminal connected to a power supply VDD and a gate terminal receiving a control signal VG1 which a control circuit 2 generates on the basis of a power supply GND, is connected to one end of a resistor R1, having the other end connected to the power supply GND, and to a gate terminal of an NMOS transistor MN1 having a drain terminal and a source terminal connected to the power supply VDD and the power supply GND, respectively, and outputs an internal signal VG2 to the gate terminal of the NMOS transistor. When a predetermined voltage or more is applied to the power supply, the power supply is short-circuited.

Abstract: A method of producing a molten steel, including the steps of putting, in an electric furnace, an iron material and a carbon material, to melt the iron material and the carbon material and produce a high-carbon molten iron whose carbon content is not lower than 1%, storing, in a reservoir furnace whose capacity is larger than a capacity of the electric furnace, an amount of the high-carbon molten iron that corresponds to a plurality of charges of the electric furnace, and using a portion of the high-carbon molten iron stored in the reservoir furnace, to produce the molten steel in a steel producing furnace.

Abstract: A method of producing a molten steel, including the steps of putting, in an electric furnace, an iron material and a carbon material, to melt the iron material and the carbon material and produce a high-carbon molten iron whose carbon content is not lower than 1%, storing, in a reservoir furnace whose capacity is larger than a capacity of the electric furnace, an amount of the high-carbon molten iron that corresponds to a plurality of charges of the electric furnace, and using a portion of the high-carbon molten iron stored in the reservoir furnace, to produce the molten steel in a steel producing furnace.

Abstract: This invention realizes high performance of an analog-digital mixed type semiconductor integrated circuit device. A gate lengths (channel lengths) of complementary MISFETs (n-channel MISFETs and p-channel MISFETs) constituting circuit blocks including a digital circuit section, an analog circuit section, and signal input/output sections are different from each other depending on characteristics of the respective circuit blocks. Also, a resistive element of a digital signal input protection circuit and a resistive element of an analog signal input protection circuit are constituted of different materials. Further, digital signal input and output sections and analog signal input and output sections are arranged to be farthest from one another on a semiconductor substrate (chip) 1, thereby providing a chip layout preventing noise of the digital signal input and output sections from entering the analog circuit section.

Abstract: In a semiconductor integrated circuit having a plurality of electronic circuits each provided with interfaces used for effecting signal transmission, and supplied with operating voltages from a plurality of independent power supply terminals, protective elements each having high threshold voltages at which the elements are off in the ordinary state of power supply are provided, and a resistor and a diode both for preventing electrostatic breakdown are connected to the gate of an input MOSFET of the interface for carrying out signal transmission between the electronic circuits. Even when a high voltage due to static electricity is applied to each power supply terminal while the semiconductor integrated circuit is handled, electrostatic breakdown of the interface can be prevented by the protective element or the electrostatic breakdown preventive circuit comprising a resistor and a diode.

Abstract: In the production of stainless steel it is aimed at to depress the highest temperature reaching during refining the molten steel with keeping the necessary tapping temperature so as to prolong the life of refractory materials of the refining furnace. After carrying out decarburization treatment under atmospheric pressure in a refining furnace by blowing an oxygen-containing gas into molten steel, further decarburization of the molten steel and reduction of chromium oxides is carried out under stirring by blowing a non-oxidizing gas under a reduced pressure, and then, reducing agent is charged into the furnace to reduce chromium oxides under keeping the reduced pressure.