Abstract: A main logical unit and a standby logical unit are defined by a process controller in a shared main memory multiprocessor, and an information storage space accessible from both logical units is provided. The main logical unit stores address information onto that information storage space by indicating a memory area it controls as the main memory area. When failover or cloning becomes necessary, the standby logical unit searches the information on the applicable address. Then from the applicable information, it also searches information on the main memory area controlled by the main logical unit to establish in itself and forms a processing environment and state identical to the main logical unit such that the standby logical unit takes over all or a portion of the processing of the main logical unit. This enables the construction of a server system of high operability to overcome failures and poor response times by failover and cloning, etc.

Abstract: A processor having an execution result prediction function for an instruction that performs a branch/value prediction by which a high percentage of correct predictions can be realized ought to be provided. Accordingly, in a branch/value prediction circuit having a set associative, a priority of an entry used for a prediction is increased only when an execution result is referred to for the prediction and the prediction is correct, and the execution result is registered in the entry of the lowest priority when the execution result for the instruction is newly registered in a history table. Thus, the entry of a low percentage of correct predictions becomes easy to erase and prediction accuracy can be increased by updating the priority only when the prediction is correct.