Patents by Inventor Akihiro UMEKI

Akihiro UMEKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8897051
    Abstract: A semiconductor storage device 100 includes a controller package 110 having a BGA terminal on a bottom surface thereof; and one or a plurality of memory packages 120 each including a plurality of semiconductor storage elements and mounted on the controller package. The controller package includes a bottom substrate having the BGA terminal on a bottom surface thereof; a power supply IC, mounted on the bottom substrate, for supplying a plurality of power supplies; and a controller mounted on the bottom substrate and operable by the plurality of power supplies supplied from the power supply IC. The controller provides an interface with an external system via the BGA terminal and controls a read operation from the semiconductor storage elements and a write operation to the semiconductor storage elements.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: November 25, 2014
    Assignee: J-Devices Corporation
    Inventors: Satoru Itakura, Akio Katsumata, Akihiro Umeki, Yasushi Shiraishi, Junichiro Abe
  • Publication number: 20140104953
    Abstract: A semiconductor storage device 100 includes a controller package 110 having a BGA terminal on a bottom surface thereof; and one or a plurality of memory packages 120 each including a plurality of semiconductor storage elements and mounted on the controller package. The controller package includes a bottom substrate having the BGA terminal on a bottom surface thereof; a power supply IC, mounted on the bottom substrate, for supplying a plurality of power supplies; and a controller mounted on the bottom substrate and operable by the plurality of power supplies supplied from the power supply IC. The controller provides an interface with an external system via the BGA terminal and controls a read operation from the semiconductor storage elements and a write operation to the semiconductor storage elements.
    Type: Application
    Filed: October 14, 2013
    Publication date: April 17, 2014
    Applicant: J-DEVICES CORPORATION
    Inventors: Satoru ITAKURA, Akio Katsumata, Akihiro Umeki, Yasushi Shiraishi, Junichiro Abe
  • Publication number: 20130256865
    Abstract: In the semiconductor module comprising a package substrate, a first semiconductor package, and a semiconductor bare chip, such problems as the occurrence of a wire short caused by warpage of the first semiconductor package and non-filling and the like at the time of resin sealing can be solved. A semiconductor module 10, having: a semiconductor package 6, which is obtained by mounting and resin-sealing a semiconductor bare chip on a first package substrate; a semiconductor bare chip 2; and a second package substrate 12, the semiconductor module being characterized in that the semiconductor package 6 is mounted on the second package substrate 12 and the semiconductor bare chip 2 is mounted on the semiconductor package 6.
    Type: Application
    Filed: February 27, 2013
    Publication date: October 3, 2013
    Inventors: Akihiro UMEKI, Yoichi HIRUTA