Abstract: A gate drive circuit according to an embodiment includes: a voltage detector that detects a voltage between a first terminal and a second terminal of a switching device; a delay circuit that outputs, with a delay for a predetermined time, a detected value of the voltage obtained from the voltage detector; and a first off-mode drive circuit and a second off-mode drive circuit that apply a control signal to a control terminal of the switching device for turning off the switching device, wherein the first off-mode drive circuit turns off the switching device faster than the second off-mode drive circuit, and stops its operation to turns off the switching device when the delayed voltage value output from the delay circuit exceeds a predetermined threshold value.

Abstract: A circuit configured to, for each of values of output currents output from power conversion devices connected in parallel to one another and driven based on common ON signals applied to the power conversion devices, output a difference between the output current value and a reference value when a polarity of the output current value is positive, and output a difference between an absolute value of the output current value and an absolute value of the reference value when the polarity of the output current value is negative; and a circuit configured to output adjustment time signals each of which indicates an amount of a delay time of a rising timing or a falling timing of the ON signal, according to an output value of the output current difference calculation circuit.

Abstract: A circuit according to an embodiment includes a circuit configured to, for each of values of output currents output from power conversion devices connected in parallel to one another and driven based on common ON signals applied to the power conversion devices, output a difference between the output current value and a reference value when a polarity of the output current value is positive, and output a difference between an absolute value of the output current value and an absolute value of the reference value when the polarity of the output current value is negative; and a circuit configured to output adjustment time signals each of which indicates an amount of a delay time of a rising timing or a falling timing of the ON signal, according to an output value of the output current difference calculation circuit.

Abstract: According to one embodiment, a semiconductor switch includes a first element that includes a switching element and an anti-parallel diode. The switching element has a breakdown voltage and is coupled to a control terminal and second and third terminals. The semiconductor switch further includes a second element having a breakdown voltage lower than that of the first element. The second element is coupled to a control terminal and second and third terminals. The semiconductor switch also includes a flyback diode having a breakdown voltage substantially similar to that of the first element. A negative electrode of the first element is connected to a negative electrode of the second element and the flyback diode is connected in parallel between a positive terminal of the first element and a positive terminal of the second element. The control terminal for the first element and the control terminal for the second element are coupled to one or more control circuits independently of each other.

Abstract: According to one embodiment, a semiconductor switch includes a first element that includes a switching element and an anti-parallel diode. The switching element has a breakdown voltage and is coupled to a control terminal and second and third terminals. The semiconductor switch further includes a second element having a breakdown voltage lower than that of the first element. The second element is coupled to a control terminal and second and third terminals. The semiconductor switch also includes a flyback diode having a breakdown voltage substantially similar to that of the first element. A negative electrode of the first element is connected to a negative electrode of the second element and the flyback diode is connected in parallel between a positive terminal of the first element and a positive terminal of the second element. The control terminal for the first element and the control terminal for the second element are coupled to one or more control circuits independently of each other.

Abstract: There are provided: a voltage division circuit (13) that performs voltage division of the voltage applied between the main electrodes of a non-latching switching element (11) having two main electrodes and a single control electrode at voltage division elements (14a) to (14c); a control current source (16) that injects current at the control electrode in accordance with the divided voltage of main voltage detection voltage division elements, of the voltage division elements (14a) to (14c) of the voltage division circuit (13) and a voltage division ratio control circuit (20) that adjusts the voltage division ratio of the main voltage detection voltage division elements (14b), (14c) of the voltage division circuit (13) in accordance with a control signal for controlling the switching element (11).

Abstract: There are provided: a voltage division circuit (13) that performs voltage division of the voltage applied between the main electrodes of a non-latching switching element (11) having two main electrodes and a single control electrode at voltage division elements (14a) to (14c); a control current source (16) that injects current at the control electrode in accordance with the divided voltage of main voltage detection voltage division elements, of the voltage division elements (14a) to (14c) of the voltage division circuit (13) and a voltage division ratio control circuit (20) that adjusts the voltage division ratio of the main voltage detection voltage division elements (14b), (14c) of the voltage division circuit (13) in accordance with a control signal for controlling the switching element (11).