Patents by Inventor Akihisa Taniguchi

Akihisa Taniguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5462884
    Abstract: A semiconductor device with a small gate-source capacitance is fabricated by disposing a semiconductor epitaxial layer of one conductivity type on a substrate. Two metal layers which, when subjected to etching by a selected etchant, are etched at different rates, are disposed in a stack on the epitaxial layer. The stack is then subjected to dry-etching to form a gate electrode including a wider (larger gate length) upper electrode section and a narrower (smaller gate length) lower gate electrode section. The upper gate electrode section is used as a mask for implanting an impurity of the opposite conductivity type into the semiconductor epitaxial layer, which results in a source region having an edge close to but not extending into the portion beneath the lower gate electrode section.
    Type: Grant
    Filed: September 23, 1994
    Date of Patent: October 31, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Akihisa Taniguchi
  • Patent number: 5399510
    Abstract: In order to simplify the structure of a power amplifying transistor and improve its high-frequency characteristics, a base electrode (7b) and a collector electrode (7c) are formed on the surface of such a power amplifying transistor, while an emitter electrode (7e) is formed on its rear surface. Since it is possible to easily ground the emitter electrode (7e) and use the base and collector electrodes (7b, 7c) as an input and an output respectively, the structure is simplified and no wiring pattern is required, whereby high-frequency characteristics can be improved.
    Type: Grant
    Filed: February 2, 1994
    Date of Patent: March 21, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Akihisa Taniguchi
  • Patent number: 5384479
    Abstract: A semiconductor device with a small gate-source capacitance is fabricated by growing a semiconductor epitaxial layer of a first conductivity type on a substrate. Two metal layers that are etched at different rates are successively deposited on the epitaxial layer. The metal layers are dry-etched to form a gate electrode including a wider (larger gate length) upper gate electrode section and a narrower (smaller gate length) lower gate electrode section. The upper gate electrode section is used as a mask for implanting a dopant impurity into the semiconductor epitaxial layer to form a source region having an edge close to but not extending beneath the lower gate electrode section.
    Type: Grant
    Filed: October 9, 1992
    Date of Patent: January 24, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Akihisa Taniguchi
  • Patent number: 5323056
    Abstract: In order to simplify the structure of a power amplifying transistor and improve its high-frequency characteristics, a base electrode (7b) and a collector electrode (7c) are formed on the surface of such a power amplifying transistor, while an emitter electrode (7e) is formed on its rear surface. Since it is possible to easily ground the emitter electrode (7e) and use the base and collector electrodes (7b, 7c) as an input and an output respectively, the structure is simplified and no wiring pattern is required, whereby high-frequency characteristics can be improved.
    Type: Grant
    Filed: December 31, 1991
    Date of Patent: June 21, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Akihisa Taniguchi