Abstract: A device of pulse width modulation type for load drive according to the present invention includes a first output unit (3) that applies a first output signal (e) to a load (5) in response to a first drive timing signal (c), a second output unit (4) that applies a second output signal (f) to the load (5) in response to a second drive timing signal (d), a signal converter (1) that converts a drive input signal (a) into a parallel signal (b), the drive input signal indicating time information allowing a potential difference to be generated across the load (5), and a drive timing generator (2) that generates the first and second drive timing signals (c, d) in response to the parallel signal (b), the load (5) being driven by increasing and reducing pulse widths of the first and second output signals (e, f).

Abstract: A device of pulse width modulation type for load drive according to the present invention includes a first output unit (3) that applies a first output signal (e) to a load (5) in response to a first drive timing signal (c), a second output unit (4) that applies a second output signal (f) to the load (5) in response to a second drive timing signal (d), a signal converter (1) that converts a drive input signal (a) into a parallel signal (b), the drive input signal indicating time information allowing a potential difference to be generated across the load (5), and a drive timing generator (2) that generates the first and second drive timing signals (c, d) in response to the parallel signal (b), the load (5) being driven by increasing and reducing pulse widths of the first and second output signals (e, f).

Abstract: The invention provides a process for selectively polishing a main electrically conductive layer of an integrated circuit structure by the steps of forming a polishing barrier layer over depressed regions of the main electrically conductive layer; and polishing the portion of the main electrically conductive layer not covered by the polishing barrier layer. The integrated circuit structure treated by the process of the invention contains one or more openings in a layer of dielectric material, and the main electrically conductive layer fills the one or more openings such that the depressed regions of the main electrically conductive layer overlie said one or more openings.

Abstract: A process for forming an integrated circuit structure wherein trenches and/or vias are formed in a predetermined pattern in a dielectric layer, lined with a barrier layer of a first electrically conductive material, and then filled with a second electrically conductive material, and the structure is then planarized to remove the first and second electrically conductive material from the upper surface of the dielectric layer, wherein the improvements comprise: a) before the planarizing step, forming over the second electrically conductive material a layer of a planarizable material capable of being planarized at about the same rate as the first electrically conductive material; and b) then planarizing the structure to remove: i) the planarizable material; ii) the second electrically conductive material; and iii) the first electrically conductive material; above the upper surface of the dielectric material; whereby the planarizable material above the second electrically conductive material in the trenche

Abstract: A method for chemical-mechanical polishing of a layer that is deposited on a surface of an integrated circuit substrate is described. The method includes: (1) immobilizing the integrated circuit substrate using a substrate holder such that the integrated circuit substrate surface is positioned against a surface of a polishing pad, which is mounted on a supporting surface; (2) a first stage of polishing the substrate surface including maintaining a predetermined difference between the rotational velocity of the polishing pad and the rotational velocity of the substrate holder allowing an endpoint of the chemical-mechanical polishing process of the layer to be detected; and (3) a second stage of polishing the substrate such that the rotational velocity of the polishing pad and the rotational velocity of the substrate holder are substantially the same to produce a substantially planar substrate surface.