Abstract: A ring oscillator system for characterizing substrate strain including, a substrate including a through-substrate-via, at least two ring oscillators, wherein a first ring oscillator is closer to the through-substrate-via than a second ring oscillator, and a logic difference circuit that is configured to receive an input from at least the first ring oscillator and the second ring oscillator, and detect a difference between the signal frequency of the first ring oscillator and the signal frequency of the second ring oscillator.

Abstract: A ring oscillator system for characterizing substrate strain including, a substrate including a through-substrate-via, at least two ring oscillators, wherein a first ring oscillator is closer to the through-substrate-via than a second ring oscillator, and a logic difference circuit that is configured to receive an input from at least the first ring oscillator and the second ring oscillator, and detect a difference between the signal frequency of the first ring oscillator and the signal frequency of the second ring oscillator.

Abstract: A ring oscillator system for characterizing substrate strain including, a substrate including a through-substrate-via, at least two ring oscillators, wherein a first ring oscillator is closer to the through-substrate-via than a second ring oscillator, and a logic difference circuit that is configured to receive an input from at least the first ring oscillator and the second ring oscillator, and detect a difference between the signal frequency of the first ring oscillator and the signal frequency of the second ring oscillator.

Abstract: A ring oscillator system for characterizing substrate strain including, a substrate including a through-substrate-via, at least two ring oscillators, wherein a first ring oscillator is closer to the through-substrate-via than a second ring oscillator, and a logic difference circuit that is configured to receive an input from at least the first ring oscillator and the second ring oscillator, and detect a difference between the signal frequency of the first ring oscillator and the signal frequency of the second ring oscillator.

Abstract: A method of forming a wavy line interconnect structure that accommodates small metal lines and enlarged diameter vias is disclosed. The enlarged diameter vias can be formed using a self-aligned dual damascene process without the need for a separate via lithography mask. The enlarged diameter vias make direct contact with at least three sides of the underlying metal lines, and can be aligned asymmetrically with respect to the metal line to increase the packing density of the metal pattern. The resulting vias have an aspect ratio that is relatively easy to fill, while the larger via footprint provides low via resistance. By allowing the via footprint to exceed the minimum size of the metal line width, a path is cleared for further process generations to continue shrinking metal lines to dimensions below 10 nm.

Abstract: A wavy line interconnect structure that accommodates small metal lines and enlarged diameter vias is disclosed. The enlarged diameter vias can be formed using a self-aligned dual damascene process without the need for a separate via lithography mask. The enlarged diameter vias make direct contact with at least three sides of the underlying metal lines, and can be aligned asymmetrically with respect to the metal line to increase the packing density of the metal pattern. The resulting vias have an aspect ratio that is relatively easy to fill, while the larger via footprint provides low via resistance. An interconnect structure having enlarged diameter vias can also feature air gaps to reduce the chance of dielectric breakdown. By allowing the via footprint to exceed the minimum size of the metal line width, a path is cleared for further process generations to continue shrinking metal lines to dimensions below 10 nm.

Abstract: A wavy line interconnect structure that accommodates small metal lines and enlarged diameter vias is disclosed. The enlarged diameter vias can be formed using a self-aligned dual damascene process without the need for a separate via lithography mask. The enlarged diameter vias make direct contact with at least three sides of the underlying metal lines, and can be aligned asymmetrically with respect to the metal line to increase the packing density of the metal pattern. The resulting vias have an aspect ratio that is relatively easy to fill, while the larger via footprint provides low via resistance. An interconnect structure having enlarged diameter vias can also feature air gaps to reduce the chance of dielectric breakdown. By allowing the via footprint to exceed the minimum size of the metal line width, a path is cleared for further process generations to continue shrinking metal lines to dimensions below 10 nm.

Abstract: A wavy line interconnect structure that accommodates small metal lines and enlarged diameter vias is disclosed. The enlarged diameter vias can be formed using a self-aligned dual damascene process without the need for a separate via lithography mask. The enlarged diameter vias make direct contact with at least three sides of the underlying metal lines, and can be aligned asymmetrically with respect to the metal line to increase the packing density of the metal pattern. The resulting vias have an aspect ratio that is relatively easy to fill, while the larger via footprint provides low via resistance. An interconnect structure having enlarged diameter vias can also feature air gaps to reduce the chance of dielectric breakdown. By allowing the via footprint to exceed the minimum size of the metal line width, a path is cleared for further process generations to continue shrinking metal lines to dimensions below 10 nm.

Abstract: A method and apparatus measure transistor bandwidth of a device under test in-line and on-wafer. The method includes disposing a measurement circuit on a chip within a wafer, the measurement circuit including a ring oscillator generating an oscillation frequency for transition through the device under test on the wafer, and obtaining an amplitude gain based on the measurement circuit for the corresponding frequency.