Abstract: Methods, systems, and devices for corrective read techniques for memory systems are described. A memory system may determine respective ranges of stored charge for each first memory cell of a set of first memory cells associated with a first word line. The ranges of stored charge may correspond to respective written states of each first memory cell. The memory system may read a set of second memory cells associated with a second word line based on biasing each second memory cell of the plurality of second memory cells with a respective set of one or more read voltages. The one or more read voltages may be based on the respective ranges of stored charge of the first memory cells. The memory system may output data associated with the second word line based on the reading of the plurality of second memory cells.

Abstract: Methods, systems, and devices for reducing latency for data recovery procedures in memory systems are described. A memory system may initialize an error recovery procedure in response to a failure to correct data read the memory system during a first read operation, where the first read operation is performed using a first read voltage. In response to the initialization, the memory system may identify, as part of the error recovery procedure, a first read offset from multiple read offsets according to a first syndrome weight generated as part of an attempt to correct the data. Accordingly, the memory system may perform, as part of the error recovery procedure, a second read operation to obtain the data, where the second read operation may be performed using a second read voltage that is the first read voltage modified by the first read offset.

Abstract: Methods, systems, and devices for garbage collection based on data characteristics are described. A memory system may receive a write command associated with a first logical block address (LBA) of a virtual block of the memory system, where the virtual block may be associated with a first value indicating a version of the virtual block. The memory system may adjust a value of a first counter within a mapping table in response to a difference between the first value and a second value satisfying a first threshold value. The second value may indicate a quantity of opened virtual blocks. The memory system may determine whether the value of the first counter satisfies a second threshold value, and transfer as part of garbage collection, data associated with the virtual block to a second virtual block in response to the value of the first counter satisfying the second threshold value.