Patents by Inventor Akimichi HIROTA

Akimichi HIROTA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240178874
    Abstract: An antenna device is configured to include: a divider circuit including an input/output terminal and a plurality of divider terminals; a plurality of matching circuits including one ends connected with the divider terminals; and a plurality of antenna elements connected with other ends of the matching circuits. Furthermore, the matching circuits are lossless circuits each having only an inductance component and a capacitance component, and the divider circuit is a lossless circuit whose characteristic impedance is indicated only by the inductance component and the capacitance component.
    Type: Application
    Filed: February 6, 2024
    Publication date: May 30, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Toru FUKASAWA, Akimichi HIROTA
  • Publication number: 20240171163
    Abstract: A frequency selecting/switching circuit includes an input terminal, an output terminal, a two-way splitter circuit, a first phase-adjusting circuit, a second phase-adjusting circuit, a first switch, and a second switch. The two-way splitter circuit splits a signal inputted to the input terminal into first and second frequency components and outputs them to its first output end and second output end, respectively. The first output end and second output end of the two-way splitter circuit are connected to a first end of the first phase-adjusting circuit and a first end of the second phase-adjusting circuit, respectively. A second end of the first phase-adjusting circuit and a second end of the second phase-adjusting circuit are connected to the first switch and the second switch, respectively. Each switch switches an output of a signal inputted to its input end, to its output end between a conductive state and a non-conductive state.
    Type: Application
    Filed: January 29, 2024
    Publication date: May 23, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroyuki AOYAMA, Akimichi HIROTA, Hidenori YUKAWA, Toru FUKASAWA
  • Patent number: 11394095
    Abstract: To obtain a downsized dielectric filter suitable for a laminating structure, a dielectric filter is configured with use of a dielectric waveguide formed of a conductor pattern and vias in a laminating direction within a multilayer dielectric substrate, two strip lines formed in a planar direction of the multilayer dielectric substrate, and two strip line-waveguide converters each configured to perform transmission line conversion between the dielectric waveguide and each strip line. In this manner, it is possible to provide a dielectric filter for which an area to be occupied in the planar direction of the multilayer dielectric substrate is suppressed.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: July 19, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hideharu Yoshioka, Akimichi Hirota, Takeshi Yuasa, Tomokazu Hamada, Yasuo Morimoto
  • Patent number: 11069949
    Abstract: A hollow-waveguide-to-planar-waveguide transition circuit includes: strip conductors formed on a first main surface of a dielectric substrate; a ground conductor formed on the back side, facing the strip conductors; a slot formed in the ground conductor; and a coupling conductor formed at a position to be electrically coupled with the strip conductors. The coupling conductor has: a main body portion electrically coupled with the strip conductors; and protruding portions protruding from the main body portion. The protruding portions are formed so as to face an end portion of the slot.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: July 20, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiromasa Nakajima, Akimichi Hirota, Naofumi Yoneda, Takeshi Oshima
  • Patent number: 10992018
    Abstract: A coaxial-waveguide-to-hollow-waveguide transition circuit (1) includes a hollow waveguide (10), a coaxial waveguide (20) having an end coupled to a wide wall (16) of the hollow waveguide (10), and a strip conductor (30) located inside the internal path (10h) of the hollow waveguide (10). The coaxial waveguide (20) includes a conducting core wire (22) extending into the internal path (10h) of the hollow waveguide (10). The strip conductor (30) is located so as to make a short-circuit connection between the conducting core wire (22) of the coaxial waveguide (20) and a termination surface (12) of the hollow waveguide (10).
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: April 27, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akimichi Hirota, Takeshi Oshima, Naofumi Yoneda, Jun Nishihara, Hiroyuki Nonomura
  • Patent number: 10971792
    Abstract: Provided is a structure configured to electrically connect multi-layer dielectric waveguides, each including a dielectric waveguide formed of conductor patterns and vias in a laminating direction of the multi-layer dielectric substrate, in which the vias for forming part of a waveguide wall of each of the dielectric waveguides are arranged in a staggered pattern in the multi-layer dielectric substrate side having choke structures formed so as to electrically connect the waveguides to each other.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: April 6, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hideharu Yoshioka, Yasuo Morimoto, Naofumi Yoneda, Akimichi Hirota, Tomokazu Hamada, Tsuyoshi Hatate
  • Patent number: 10964631
    Abstract: A semiconductor package includes a package main body. The package main body includes: a lead frame that includes first terminals and a die pad; two or more integrated circuit chips that are disposed on the die pad; one or more electrically conductive members that are disposed on the die pad; wires that connect the first terminals and the integrated circuit chips electrically; and a molded member that seals the lead frame, the integrated circuit chips, the electrically conductive member, and the wires. An upper surface, a bottom surface, and side surfaces of the package main body are formed by the molded member. The electrically conductive member is exposed through the upper surface of the package main body, and the die pad is exposed through the bottom surface of the package main body.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: March 30, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hideharu Yoshioka, Akimichi Hirota, Naofumi Yoneda, Hidenori Ishibashi, Shintaro Shinjo, Kiyoshi Ishida, Hideki Morishige
  • Publication number: 20210083353
    Abstract: To obtain a downsized dielectric filter suitable for a laminating structure, a dielectric filter is configured with use of a dielectric waveguide formed of a conductor pattern and vias in a laminating direction within a multilayer dielectric substrate, two strip lines formed in a planar direction of the multilayer dielectric substrate, and two strip line-waveguide converters each configured to perform transmission line conversion between the dielectric waveguide and each strip line. In this manner, it is possible to provide a dielectric filter for which an area to be occupied in the planar direction of the multilayer dielectric substrate is suppressed.
    Type: Application
    Filed: June 7, 2018
    Publication date: March 18, 2021
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hideharu YOSHIOKA, Akimichi HIROTA, Takeshi YUASA, Tomokazu HAMADA, Yasuo MORIMOTO
  • Patent number: 10930995
    Abstract: Provided is a power divider/combiner capable of improving reflection characteristics and isolation characteristics. The power divider/combiner is formed by a multilayer board, and a strip conductor is arranged in an inner layer of the multilayer board and a chip resistor is arranged on an outer surface of the multilayer board. The power divider/combiner includes vias, which connect the strip conductor and the chip resistor, and includes stubs mounted between input/output terminals and the vias. With this configuration, it is possible to adjust induction mainly during an odd mode of an even/odd mode operation and to consequently improve reflection characteristics of the input/output terminals and isolation characteristics between the input/output terminals.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: February 23, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hideharu Yoshioka, Akimichi Hirota, Naofumi Yoneda, Hidenori Ishibashi
  • Patent number: 10811753
    Abstract: A hollow-waveguide-to-planar-waveguide transition circuit includes: a dielectric substrate; strip conductors formed on a first main surface of the dielectric substrate; a ground conductor formed on a second main surface of the dielectric substrate, facing the strip conductors in the thickness direction; a slot formed in the ground conductor; a coupling conductor formed at a position to be electrically coupled with the strip conductors on the first main surface; and branch conductor lines formed on the first main surface. Each of the branch conductor lines includes a base portion branching from the coupling conductor and a tip portion that is electrically open.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: October 20, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiromasa Nakajima, Akimichi Hirota, Naofumi Yoneda, Takeshi Oshima
  • Publication number: 20200328491
    Abstract: A coaxial-waveguide-to-hollow-waveguide transition circuit (1) includes a hollow waveguide (10), a coaxial waveguide (20) having an end coupled to a wide wall (16) of the hollow waveguide (10), and a strip conductor (30) located inside the internal path (10h) of the hollow waveguide (10). The coaxial waveguide (20) includes a conducting core wire (22) extending into the internal path (10h) of the hollow waveguide (10). The strip conductor (30) is located so as to make a short-circuit connection between the conducting core wire (22) of the coaxial waveguide (20) and a termination surface (12) of the hollow waveguide (10).
    Type: Application
    Filed: July 22, 2016
    Publication date: October 15, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Akimichi HIROTA, Takeshi OSHIMA, Naofumi YONEDA, Jun NISHIHARA, Hiroyuki NONOMURA
  • Publication number: 20200235456
    Abstract: Provided is a power divider/combiner capable of improving reflection characteristics and isolation characteristics. The power divider/combiner is formed by a multilayer board, and a strip conductor is arranged in an inner layer of the multilayer board and a chip resistor is arranged on an outer surface of the multilayer board. The power divider/combiner includes vias, which connect the strip conductor and the chip resistor, and includes stubs mounted between input/output terminals and the vias. With this configuration, it is possible to adjust induction mainly during an odd mode of an even/odd mode operation and to consequently improve reflection characteristics of the input/output terminals and isolation characteristics between the input/output terminals.
    Type: Application
    Filed: February 2, 2017
    Publication date: July 23, 2020
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hideharu YOSHIOKA, Akimichi HIROTA, Naofumi YONEDA, Hidenori ISHIBASHI
  • Publication number: 20200235454
    Abstract: A hollow-waveguide-to-planar-waveguide transition circuit includes: strip conductors formed on a first main surface of a dielectric substrate; a ground conductor formed on the back side, facing the strip conductors; a slot formed in the ground conductor; and a coupling conductor formed at a position to be electrically coupled with the strip conductors. The coupling conductor has: a main body portion electrically coupled with the strip conductors; and protruding portions protruding from the main body portion. The protruding portions are formed so as to face an end portion of the slot.
    Type: Application
    Filed: July 5, 2016
    Publication date: July 23, 2020
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiromasa NAKAJIMA, Akimichi HIROTA, Naofumi YONEDA, Takeshi OSHIMA
  • Patent number: 10707910
    Abstract: A microwave module includes an RF device and a multilayer resin substrate. The device includes a metal cover covering at least an internal circuit. The substrate includes a first end face on a side of the device, a second end face on a side opposite to the first end face, a signal through-holes surrounding the circuit and connected to the circuit, ground through-holes surrounding the signal through-holes and connected to the cover, a first surface ground provided on the first end face and connected to the cover, an inner layer surface ground connected to ground through-holes, and an RF transmission line surrounded by the ground through-holes, the first surface ground, and the inner layer surface ground, and connected to the signal through-hole.
    Type: Grant
    Filed: December 7, 2016
    Date of Patent: July 7, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yukinobu Tarui, Makoto Kimura, Isamu Ryokawa, Akimichi Hirota, Hiroyuki Mizutani
  • Patent number: 10673117
    Abstract: A waveguide circuit (1) includes a first waveguide tube (10), a second waveguide tube (20), and a third waveguide tube (30). The first waveguide tube (10), the second waveguide tube (20), and the third waveguide tube (30) have cross-sectional shapes to allow propagation of TE modes. The tube axis of the second waveguide tube (20) is parallel to the tube axis of the first waveguide tube (10). One of the narrow sidewalls of the second waveguide tube (20) faces a narrow sidewall (10s) of the first waveguide tube (10). The third waveguide tube (30) includes a coupler that connects a hollow guide of the third waveguide tube (30) to a hollow guide of the first waveguide tube (10) and a hollow guide of the second waveguide tube (20).
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: June 2, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akimichi Hirota, Takeshi Oshima, Naofumi Yoneda, Jun Nishihara, Hiroyuki Nonomura
  • Publication number: 20200126896
    Abstract: A semiconductor package includes a package main body. The package main body includes: a lead frame that includes first terminals and a die pad; two or more integrated circuit chips that are disposed on the die pad; one or more electrically conductive members that are disposed on the die pad; wires that connect the first terminals and the integrated circuit chips electrically; and a molded member that seals the lead frame, the integrated circuit chips, the electrically conductive member, and the wires. An upper surface, a bottom surface, and side surfaces of the package main body are formed by the molded member. The electrically conductive member is exposed through the upper surface of the package main body, and the die pad is exposed through the bottom surface of the package main body.
    Type: Application
    Filed: February 25, 2016
    Publication date: April 23, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hideharu YOSHIOKA, Akimichi HIROTA, Naofumi YONEDA, Hidenori ISHIBASHI, Shintaro SHINJO, Kiyoshi ISHIDA, Hideki MORISHIGE
  • Patent number: 10615497
    Abstract: An object of the present invention is to vary the directivity of an antenna (100a) while reducing the signal loss by switching circuits (5a-5d) in a splitter circuit. The switching circuits (5a-5d) in the splitter circuit connect or disconnect n (n is an integer of 2 or more) second lines (12a) connected in parallel with a first line (10a) to/from output terminals (7) connected to n antenna elements (8) having different directivities of signals. If m (m is an integer ranging from 1 to n?1) switching circuits (5b, 5d) arbitrarily selected from the n switching circuits (5a-5d) are switched to on-states, the characteristic impedance of each of the n second lines (12a) is set to a product between the characteristic impedance of the first line (10a) and the number m of switching circuits (5b and 5d) switched to on-states.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: April 7, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hikaru Watanabe, Takashi Maruyama, Akimichi Hirota, Satoshi Yamaguchi, Masataka Otsuka
  • Publication number: 20200028228
    Abstract: Provided is a structure configured to electrically connect multi-layer dielectric waveguides, each including a dielectric waveguide formed of conductor patterns and vias in a laminating direction of the multi-layer dielectric substrate, in which the vias for forming part of a waveguide wall of each of the dielectric waveguides are arranged in a staggered pattern in the multi-layer dielectric substrate side having choke structures formed so as to electrically connect the waveguides to each other.
    Type: Application
    Filed: April 12, 2017
    Publication date: January 23, 2020
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hideharu YOSHIOKA, Yasuo MORIMOTO, Naofumi YONEDA, Akimichi HIROTA, Tomokazu HAMADA, Tsuyoshi HATATE
  • Patent number: 10511102
    Abstract: A feeder circuit includes: a first line 103 having first and second ends; a second line 104 having first and second ends; a third line 105 having first and second ends; a first combiner 101 configured to combine signals output from the second ends of the first and second lines 103 and 104; a first coupling portion 115 configured to electrically couple portions of the first and third lines to each other; and a second coupling portion 116 configured to electrically couple portions of the second and third lines to each other in a manner that allows a signal reaching the first combiner from the first end of the third line through the first coupling portion and a signal reaching the first combiner from the first end of the third line through the second coupling portion, to be cancelled out.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: December 17, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akimichi Hirota, Naofumi Yoneda, Shigeo Udagawa, Mitsuru Kirita
  • Patent number: 10438862
    Abstract: A recess in a metal housing accommodating a high frequency package includes a first space and a second space and has a winners podium shape in cross-sectional view. A thermally conductive material is sandwiched between the metal housing having heat dissipating fins and the high frequency package.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: October 8, 2019
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yasuo Morimoto, Hideharu Yoshioka, Akimichi Hirota, Naofumi Yoneda, Takuma Ishibashi