Abstract: The voltage hold circuit is a voltage hold circuit configured to operate every processing cycle, the processing cycle including a hold period and a reset period following the hold period, and hold a voltage value for an input voltage signal, the voltage hold circuit including: a first hold circuit configured to operate to hold a minimum voltage value for the input voltage signal in the hold period every the processing cycle; and a second hold circuit configured to operate to hold a maximum voltage value for the input voltage signal in the reset period every the processing cycle.

Abstract: A peak/bottom detection circuit is disclosed. A comparator compares a voltage of one of three or more capacitors with an input voltage. A calculation amplifier amplifies the voltage of one of the three or more capacitors. Each of three or more switches respectively corresponding to the three or more capacitors connects a corresponding capacitor among the three or more capacitors to one of the comparator, the calculation amplifier, and a source of the input voltage. A controller generates control signals for sequentially switching connection destinations of the three or more capacitors and to supply the control signals to the three or more switches, respectively, in which the connection destinations of three capacitors among the three or more capacitors are different from each other.

Abstract: A peak/bottom detection circuit is disclosed. A comparator compares a voltage of one of three or more capacitors with an input voltage. A calculation amplifier amplifies the voltage of one of the three or more capacitors. Each of three or more switches respectively corresponding to the three or more capacitors connects a corresponding capacitor among the three or more capacitors to one of the comparator, the calculation amplifier, and a source of the input voltage. A controller generates control signals for sequentially switching connection destinations of the three or more capacitors and to supply the control signals to the three or more switches, respectively, in which the connection destinations of three capacitors among the three or more capacitors are different from each other.

Abstract: A power source circuit includes: a P-type transistor one of a source and a drain of which is connected to a first power source line and the other of the source and the drain of which is connected to an output node; a resistor connected between a back gate of the P-type transistor and the first power source line; and a capacitance element connected to the back gate of the P-type transistor and to a second power source line having a potential lower than a potential of the first power source line.

Abstract: In a constant voltage circuit including: an error amplifier circuit amplifying a difference voltage between an output voltage and a reference voltage; and an output transistor controlling the output voltage based on an output of the error amplifier circuit, a voltage proportional to a leakage current detected by a monitoring transistor is generated by an oscillation circuit and a charge pump circuit and is supplied to a back gate of the output transistor.

Abstract: A power supply has first and second reference voltage sources; a step-down voltage generator, including a transistor supplied with a first voltage, a resistor string between the transistor and a second voltage, and an op-amp which controls the transistor, and outputting the voltage at a first node among nodes in the resistor string; switches, coupled to the nodes; a comparison circuit, which compares the voltage at a common node the switches coupling in common with the second reference voltage source; and a calibration control circuit, which selects any switch according to a comparison result to calibrate. During calibration, the calibration control circuit couples a second node among the nodes to a non-inverting terminal of the op-amp, and the first reference voltage source to an inverting terminal of the op-amp, and after calibration, couples the common node to the non-inverting terminal, and the second reference voltage source to the inverting terminal.

Abstract: The integrated circuit device includes: an electrostatic protection circuit that is provided between first and second power supply lines coupled to external terminals respectively, and forms a current pathway between the first and second power supply lines during a given period in response to an increase in a voltage between the first and second power supply lines; and a power supply generating circuit that performs power supply control based on a voltage of the first power supply line and generates a control signal in accordance with a switching timing of the power supply control. And, the electrostatic protection circuit includes an adjustment circuit for shortening the given period in response to the control signal.

Abstract: The integrated circuit device includes: an electrostatic protection circuit that is provided between first and second power supply lines coupled to external terminals respectively, and forms a current pathway between the first and second power supply lines during a given period in response to an increase in a voltage between the first and second power supply lines; and a power supply generating circuit that performs power supply control based on a voltage of the first power supply line and generates a control signal in accordance with a switching timing of the power supply control. And, the electrostatic protection circuit includes an adjustment circuit for shortening the given period in response to the control signal.

Abstract: An image display device including a liquid crystal display panel is provided which is capable of achieving reduction of power consumption and EMI (Electromagnetic Interference) by lowering an amount of transfer of digital gray-scale data. To the liquid crystal display panel are connected a display controlling circuit, a scanning line driving circuit, and a signal line driving circuit. If input gray-scale data corresponding to a present line does not match gray-scale data corresponding to a previous line, gray-scale data is output and D/A (digital-analog) converted signal voltage is output. If both the gray-scale data are matched with each other, a matching signal is output to have D/A converted signal voltage be output.

Abstract: A display device is provided with a display controller, a source driver, and a liquid crystal panel, and two pairs of wirings are provided between the display controller and the source driver. The display controller is provided with a V-I conversion circuit for image data and a mode register, and the source driver is provided with an I-V conversion circuit for image data. The V-I conversion circuit for image data connects either one of a pair of the wirings to an earth electrode and sets the other one to a floating state based on the image data. The I-V conversion circuit for image data allows electric current to flow in the wiring out of a pair of the wirings, which is connected to the earth electrode, and converts the image data into a pair of complementary current signals to receive them. Further, the I-V conversion circuit for image data stops the current signal by a control signal from the mode register when the image data is not transmitted.

Abstract: A display device is provided with a display controller, a source driver, and a liquid crystal panel, and two pairs of wirings are provided between the display controller and the source driver. The display controller is provided with a V-I conversion circuit for image data and a mode register, and the source driver is provided with an I-V conversion circuit for image data. The V-I conversion circuit for image data connects either one of a pair of the wirings to an earth electrode and sets the other one to a floating state based on the image data. The I-V conversion circuit for image data allows electric current to flow in the wiring out of a pair of the wirings, which is connected to the earth electrode, and converts the image data into a pair of complementary current signals to receive them. Further, the I-V conversion circuit for image data stops the current signal by a control signal from the mode register when the image data is not transmitted.

Abstract: A display device is provided with a display controller, a source driver, and a liquid crystal panel, and two pairs of wirings are provided between the display controller and the source driver. The display controller is provided with a V-I conversion circuit for image data and a mode register, and the source driver is provided with an I-V conversion circuit for image data. The V-I conversion circuit for image data connects either one of a pair of the wirings to an earth electrode and sets the other one to a floating state based on the image data. The I-V conversion circuit for image data allows electric current to flow in the wiring out of a pair of the wirings, which is connected to the earth electrode, and converts the image data into a pair of complementary current signals to receive them. Further, the I-V conversion circuit for image data stops the current signal by a control signal from the mode register when the image data is not transmitted.

Abstract: An interface circuit includes a signal sending section having a first MOS transistor and a second MOS transistor which are alternately turned ON in accordance with a binary input signal. A signal receiving section has a third MOS transistor connected through a first signal transmission path to the first MOS transistor mounted in the signal sending section to feed a current with a predetermined value through the first signal transmission path when the first MOS transistor mounted in the signal sending section is turned ON. A fourth MOS transistor connected through a second signal transmission path to the second MOS transistor mounted in the signal sending section feeds a current with a predetermined value to the second signal transmission path when the second MOS transistor mounted in the signal sending section is turned ON.

Abstract: An image display device including a liquid crystal display panel is provided which is capable of achieving reduction of power consumption and EMI (Electromagnetic Interference) by lowering an amount of transfer of digital gray-scale data. To the liquid crystal display panel are connected a display controlling circuit, a scanning line driving circuit, and a signal line driving circuit. If input gray-scale data corresponding to a present line does not match gray-scale data corresponding to a previous line, gray-scale data is output and D/A (digital-analog) converted signal voltage is output. If both the gray-scale data are matched with each other, a matching signal is output to have D/A converted signal voltage be output.