Patents by Inventor Akimitsu Ugawa

Akimitsu Ugawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4868705
    Abstract: Incorporated in a MOS semicustom integrated circuit are pull-up and pull-down MOS transistors adapted for pulling up or down the potential of a signal line connecting a protection circuit with an internal circuit to be protected from electrostatic breakdown. The MOS transistors have their drains connected together to the signal line and their sources connected to a pull-up power supply node or pull-down power supply node as required. The MOS transistor acts as a pull-up or pull-down transistor when its source is connected to the pull-up or pull-down supply node by master slice wiring, and its drain junction acts as a protective diode when its source remains open. Thus, owing to the protection functions of the drain junction and diodes in the protection circuit, the electrostatic breakdown strength of the internal circuit can be increased without increase in the occupied area of the protection circuit in the integrated circuit.
    Type: Grant
    Filed: February 18, 1988
    Date of Patent: September 19, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masazumi Shiochi, Akimitsu Ugawa