Patents by Inventor Akinobu Shirota

Akinobu Shirota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8867293
    Abstract: A semiconductor memory device includes a memory core circuit having memory cells for storing data, a circuit configured to refresh the memory core circuit at a refresh interval, a temperature detecting unit configured to detect temperature, and a control circuit configured to shorten the refresh interval immediately in response to detection of a predetermined temperature rise by the temperature detecting unit and to elongate the refresh interval after refreshing every one of the memory cells at least once in response to detection of a temperature drop by the temperature detecting unit.
    Type: Grant
    Filed: March 21, 2013
    Date of Patent: October 21, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Akinobu Shirota, Kuninori Kawabata
  • Patent number: 8472275
    Abstract: A semiconductor memory device includes a memory core circuit having memory cells for storing data, a circuit configured to refresh the memory core circuit at a refresh interval, a temperature detecting unit configured to detect temperature, and a control circuit configured to shorten the refresh interval immediately in response to detection of a predetermined temperature rise by the temperature detecting unit and to elongate the refresh interval after refreshing every one of the memory cells at least once in response to detection of a temperature drop by the temperature detecting unit.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: June 25, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Akinobu Shirota, Kuninori Kawabata
  • Patent number: 8238188
    Abstract: A semiconductor memory device includes a memory core circuit having memory cells for storing data, a circuit configured to refresh the memory core circuit at a refresh interval, a temperature detecting unit configured to detect temperature, and a control circuit configured to shorten the refresh interval immediately in response to detection of a predetermined temperature rise by the temperature detecting unit and to elongate the refresh interval after refreshing every one of the memory cells at least once in response to detection of a temperature drop by the temperature detecting unit.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: August 7, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Akinobu Shirota, Kuninori Kawabata
  • Publication number: 20110134714
    Abstract: A semiconductor memory device includes a memory core circuit having memory cells for storing data, a circuit configured to refresh the memory core circuit at a refresh interval, a temperature detecting unit configured to detect temperature, and a control circuit configured to shorten the refresh interval immediately in response to detection of a predetermined temperature rise by the temperature detecting unit and to elongate the refresh interval after refreshing every one of the memory cells at least once in response to detection of a temperature drop by the temperature detecting unit.
    Type: Application
    Filed: February 14, 2011
    Publication date: June 9, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Akinobu SHIROTA, Kuninori Kawabata
  • Patent number: 7916568
    Abstract: A semiconductor memory device includes a memory core circuit having memory cells for storing data, a circuit configured to refresh the memory core circuit at a refresh interval, a temperature detecting unit configured to detect temperature, and a control circuit configured to shorten the refresh interval immediately in response to detection of a predetermined temperature rise by the temperature detecting unit and to elongate the refresh interval after refreshing every one of the memory cells at least once in response to detection of a temperature drop by the temperature detecting unit.
    Type: Grant
    Filed: November 3, 2008
    Date of Patent: March 29, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Akinobu Shirota, Kuninori Kawabata
  • Publication number: 20090052265
    Abstract: A semiconductor memory device includes a memory core circuit having memory cells for storing data, a circuit configured to refresh the memory core circuit at a refresh interval, a temperature detecting unit configured to detect temperature, and a control circuit configured to shorten the refresh interval immediately in response to detection of a predetermined temperature rise by the temperature detecting unit and to elongate the refresh interval after refreshing every one of the memory cells at least once in response to detection of a temperature drop by the temperature detecting unit.
    Type: Application
    Filed: November 3, 2008
    Publication date: February 26, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Akinobu SHIROTA, Kuninori Kawabata
  • Publication number: 20090040856
    Abstract: A semiconductor memory device includes a memory core circuit having memory cells for storing data, a circuit configured to refresh the memory core circuit at a refresh interval, a temperature detecting unit configured to detect temperature, and a control circuit configured to shorten the refresh interval immediately in response to detection of a predetermined temperature rise by the temperature detecting unit and to elongate the refresh interval after refreshing every one of the memory cells at least once in response to detection of a temperature drop by the temperature detecting unit.
    Type: Application
    Filed: October 15, 2008
    Publication date: February 12, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Akinobu SHIROTA, Kuninori KAWABATA
  • Patent number: 7453754
    Abstract: A semiconductor memory device includes a memory core circuit having memory cells for storing data, a circuit configured to refresh the memory core circuit at a refresh interval, a temperature detecting unit configured to detect temperature, and a control circuit configured to shorten the refresh interval immediately in response to detection of a predetermined temperature rise by the temperature detecting unit and to elongate the refresh interval after refreshing every one of the memory cells at least once in response to detection of a temperature drop by the temperature detecting unit.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: November 18, 2008
    Assignee: Fujitsu Limited
    Inventors: Akinobu Shirota, Kuninori Kawabata
  • Publication number: 20070153607
    Abstract: A semiconductor memory device includes a memory core circuit having memory cells for storing data, a circuit configured to refresh the memory core circuit at a refresh interval, a temperature detecting unit configured to detect temperature, and a control circuit configured to shorten the refresh interval immediately in response to detection of a predetermined temperature rise by the temperature detecting unit and to elongate the refresh interval after refreshing every one of the memory cells at least once in response to detection of a temperature drop by the temperature detecting unit.
    Type: Application
    Filed: March 2, 2007
    Publication date: July 5, 2007
    Inventors: Akinobu Shirota, Kuninori Kawabata
  • Patent number: 7196956
    Abstract: A semiconductor memory device includes a memory core circuit having memory cells for storing data, a circuit configured to refresh the memory core circuit at a refresh interval, a temperature detecting unit configured to detect temperature, and a control circuit configured to shorten the refresh interval immediately in response to detection of a predetermined temperature rise by the temperature detecting unit and to elongate the refresh interval after refreshing every one of the memory cells at least once in response to detection of a temperature drop by the temperature detecting unit.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: March 27, 2007
    Assignee: Fujitsu Limited
    Inventors: Akinobu Shirota, Kuninori Kawabata
  • Publication number: 20050162962
    Abstract: A semiconductor memory device includes a memory core circuit having memory cells for storing data, a circuit configured to refresh the memory core circuit at a refresh interval, a temperature detecting unit configured to detect temperature, and a control circuit configured to shorten the refresh interval immediately in response to detection of a predetermined temperature rise by the temperature detecting unit and to elongate the refresh interval after refreshing every one of the memory cells at least once in response to detection of a temperature drop by the temperature detecting unit.
    Type: Application
    Filed: March 22, 2005
    Publication date: July 28, 2005
    Inventors: Akinobu Shirota, Kuninori Kawabata