Patents by Inventor AKINORI DAIMO
AKINORI DAIMO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9654063Abstract: A bias circuit comprises: a first circuit that comprises a first resistor and a decoupling capacitor; a bias voltage generation circuit that comprises a first transistor being connected to the first circuit; one or more switches; a first replica circuit comprising a second circuit and a second transistor, the second circuit comprising a second resistor and a capacitor, the second transistor being connected to the second circuit; a second replica circuit comprising a third transistor; a comparator that makes a comparison between a pseudo-bias voltage and a reference voltage; and a control circuit that controls the one or more switches on the basis of the comparison result to reduce the amount of the current flowing through the first transistor.Type: GrantFiled: October 16, 2015Date of Patent: May 16, 2017Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yukio Okazaki, Masakatsu Maeda, Shigeki Nakamura, Akinori Daimo
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Publication number: 20160142014Abstract: A bias circuit comprises: a first circuit that comprises a first resistor and a decoupling capacitor; a bias voltage generation circuit that comprises a first transistor being connected to the first circuit; one or more switches; a first replica circuit comprising a second circuit and a second transistor, the second circuit comprising a second resistor and a capacitor, the second transistor being connected to the second circuit; a second replica circuit comprising a third transistor; a comparator that makes a comparison between a pseudo-bias voltage and a reference voltage; and a control circuit that controls the one or more switches on the basis of the comparison result to reduce the amount of the current flowing through the first transistor.Type: ApplicationFiled: October 16, 2015Publication date: May 19, 2016Inventors: YUKIO OKAZAKI, MASAKATSU MAEDA, SHIGEKI NAKAMURA, AKINORI DAIMO
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Patent number: 9294040Abstract: A power amplifier includes an output terminal, capacitive element groups including capacitive elements, and amplifier groups including amplifiers. Capacitive elements of the capacitive element groups are disposed on a first circle whose center is located on the output terminal. Amplifiers of the amplifier groups corresponding to the capacitive elements of the capacitive element groups are disposed on a second circle, which is concentric with and larger than the first circle. Each of the capacitive elements of the capacitive element groups is connected to both the output terminal and the corresponding amplifier of the amplifiers of the amplifier groups.Type: GrantFiled: November 30, 2015Date of Patent: March 22, 2016Assignee: PANASONIC CORPORATIONInventors: Yukio Okazaki, Akinori Daimo
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Publication number: 20160079928Abstract: A power amplifier includes an output terminal, capacitive element groups including capacitive elements, and amplifier groups including amplifiers. Capacitive elements of the capacitive element groups are disposed on a first circle whose center is located on the output terminal. Amplifiers of the amplifier groups corresponding to the capacitive elements of the capacitive element groups are disposed on a second circle, which is concentric with and larger than the first circle. Each of the capacitive elements of the capacitive element groups is connected to both the output terminal and the corresponding amplifier of the amplifiers of the amplifier groups.Type: ApplicationFiled: November 30, 2015Publication date: March 17, 2016Applicant: PANASONIC CORPORATIONInventors: Yukio OKAZAKI, Akinori DAIMO
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Patent number: 9240812Abstract: A power amplification device includes: a first power-amplifier array including a plurality of first switching elements that constitute a class-D power amplifier for a higher bits; a second power-amplifier array including a plurality of second switching elements that constitute a class-D power amplifier for a lower bits; and a capacitor array including a plurality of capacitance elements. The second switching elements have a larger on-resistance than the first switching elements. The first power-amplifier array is arranged between the second power-amplifier array and the capacitor array.Type: GrantFiled: February 19, 2015Date of Patent: January 19, 2016Assignee: PANASONIC CORPORATIONInventors: Masahiro Kumagawa, Akinori Daimo, Hisashi Adachi
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Patent number: 9231526Abstract: An SCPA includes a pad, capacitative elements, amplifiers on an IC chip. The capacitative elements are disposed on a first circle whose center is located on the pad. The amplifiers which correspond to the capacitative elements are disposed on a second circle which is a concentric circle larger than the first circle. The pad, each of the capacitative elements, and a corresponding one of the amplifiers are aligned in a line so that the length of wiring is the shortest.Type: GrantFiled: November 11, 2014Date of Patent: January 5, 2016Assignee: PANASONIC CORPORATIONInventors: Yukio Okazaki, Akinori Daimo
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Patent number: 9148089Abstract: A transmitting apparatus and transmission method are capable of easily and correctly mixing an in-phase component and a quadrature-phase component in a quadrature modulator. A local signal with a duty ratio of 25% or smaller is generated without using frequency which is a multiple of frequency of the local signal. Without providing switches in series to the outputs of I and Q amplifiers, a duty ratio of 25% or less is obtained. for the local signal, and class-D unit amplifiers are operated such that one of the I amplifier and the Q amplifier is connected to the output side in any state regardless of whether an output power control signal is at an on-level or an off-level. In producing the 25% duty ratio, a local signal with a 50% duty ratio is converted so as to have a duty ratio of 25% by I and Q duty converters.Type: GrantFiled: November 17, 2014Date of Patent: September 29, 2015Assignee: Panasonic CorporationInventors: Masakatsu Maeda, Masahiro Kumagawa, Hisashi Adachi, Akinori Daimo, Kenichi Mori
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Patent number: 9130610Abstract: A transmission apparatus includes a digital amplifier having a plurality of class-D amplifiers connected in parallel to each other, each of the class-D amplifiers including a logic circuit that processes input signals from two input terminals and outputs the input signals to one of two output terminals, according to a selection signal, and including capacitors connected in series to the two output terminals, respectively, a first selection circuit that outputs either an in-phase component or a quadrature component of a transmission signal to the digital amplifier depending on the selection signal, and a second selection circuit that outputs either an in-phase component carrier signal or a quadrature component carrier signal to the digital amplifier depending on the selection signal.Type: GrantFiled: January 28, 2015Date of Patent: September 8, 2015Assignee: Panasonic CorporationInventors: Masakatsu Maeda, Hisashi Adachi, Akinori Daimo, Kenichi Mori
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Publication number: 20150244324Abstract: A power amplification device includes: a first power-amplifier array including a plurality of first switching elements that constitute a class-D power amplifier for a higher bits; a second power-amplifier array including a plurality of second switching elements that constitute a class-D power amplifier for a lower bits; and a capacitor array including a plurality of capacitance elements. The second switching elements have a larger on-resistance than the first switching elements. The first power-amplifier array is arranged between the second power-amplifier array and the capacitor array.Type: ApplicationFiled: February 19, 2015Publication date: August 27, 2015Inventors: MASAHIRO KUMAGAWA, AKINORI DAIMO, HISASHI ADACHI
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Publication number: 20150236727Abstract: A transmission apparatus includes a digital amplifier having a plurality of class-D amplifiers connected in parallel to each other, each of the class-D amplifiers including a logic circuit that processes input signals from two input terminals and outputs the input signals to one of two output terminals, according to a selection signal, and including capacitors connected in series to the two output terminals, respectively, a first selection circuit that outputs either an in-phase component or a quadrature component of a transmission signal to the digital amplifier depending on the selection signal, and a second selection circuit that outputs either an in-phase component carrier signal or a quadrature component carrier signal to the digital amplifier depending on the selection signal.Type: ApplicationFiled: January 28, 2015Publication date: August 20, 2015Inventors: MASAKATSU MAEDA, HISASHI ADACHI, AKINORI DAIMO, KENICHI MORI
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Publication number: 20150180418Abstract: A transmitting apparatus and transmission method are capable of easily and correctly mixing an in-phase component and a quadrature-phase component in a quadrature modulator. A local signal with a duty ratio of 25% or smaller is generated without using frequency which is a multiple of frequency of the local signal. Without providing switches in series to the outputs of I and Q amplifiers, a duty ratio of 25% or less is obtained. for the local signal, and class-D unit amplifiers are operated such that one of the I amplifier and the Q amplifier is connected to the output side in any state regardless of whether an output power control signal is at an on-level or an off-level. In producing the 25% duty ratio, a local signal with a 50% duty ratio is converted so as to have a duty ratio of 25% by I and Q duty converters.Type: ApplicationFiled: November 17, 2014Publication date: June 25, 2015Inventors: MASAKATSU MAEDA, MASAHIRO KUMAGAWA, HISASHI ADACHI, AKINORI DAIMO, KENICHI MORI
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Publication number: 20150180429Abstract: An SCPA includes a pad, capacitative elements, amplifiers on an IC chip. The capacitative elements are disposed on a first circle whose center is located on the pad. The amplifiers which correspond to the capacitative elements are disposed on a second circle which is a concentric circle larger than the first circle. The pad, each of the capacitative elements, and a corresponding one of the amplifiers are aligned in a line so that the length of wiring is the shortest.Type: ApplicationFiled: November 11, 2014Publication date: June 25, 2015Inventors: YUKIO OKAZAKI, AKINORI DAIMO