Abstract: A memory system includes a first buffer memory, a second buffer memory having a higher memory performance rating than the first buffer memory, a nonvolatile semiconductor memory unit including an array of memory cell regions, and a control unit configured to cause data to be buffered in one of the first and second buffer memories before the data are written in the nonvolatile semiconductor memory unit, according to characteristics of the data.

Abstract: A semiconductor storage device includes m (m?2) memory chips, a buffer, and a controller. The controller arranges, in the buffer, a first plurality of data units to be transferred to N (1?N?m) of the m memory chips, in an order in which each of the first plurality of data units has been received from a host, for each one of the N memory chips, and arranges a second plurality of data units, if any, in an order in which each of the second plurality of data units has been received from the host, for each one of the next N memory chips. Upon the arranged data units, the controller collectively transfers the certain number of arranged data units to the memory. The value of N is changed based on an amount of data accumulated in the buffer.

Abstract: According to one embodiment, a memory system perform a first write operation for writing data to a non-volatile memory by a first write method for writing multi-bit information per memory cell. When a power loss event occurs while the data is written, the memory system calculates a remaining time period required to complete write of an unwritten portion of the data. When the remaining time period is longer than a time period required to write the whole of the data by a second write method for writing one-bit information per memory cell, the memory system performs a second write operation for writing the whole of the data by the second write method in place of the first write operation.

Abstract: A semiconductor storage device includes m (m?2) memory chips, a buffer, and a controller. The controller arranges, in the buffer, a first plurality of data units to be transferred to N (1?N?m) of the m memory chips, in an order in which each of the first plurality of data units has been received from a host, for each one of the N memory chips, and arranges a second plurality of data units, if any, in an order in which each of the second plurality of data units has been received from the host, for each one of the next N memory chips. Upon the arranged data units, the controller collectively transfers the certain number of arranged data units to the memory. The value of N is changed based on an amount of data accumulated in the buffer.

Abstract: According to one embodiment, a memory system perform a first write operation for writing data to a non-volatile memory by a first write method for writing multi-bit information per memory cell. When a power loss event occurs while the data is written, the memory system calculates a remaining time period required to complete write of an unwritten portion of the data. When the remaining time period is longer than a time period required to write the whole of the data by a second write method for writing one-bit information per memory cell, the memory system performs a second write operation for writing the whole of the data by the second write method in place of the first write operation.

Abstract: A memory system includes a first buffer memory, a second buffer memory having a higher memory performance rating than the first buffer memory, a nonvolatile semiconductor memory unit including an array of memory cell regions, and a control unit configured to cause data to be buffered in one of the first and second buffer memories before the data are written in the nonvolatile semiconductor memory unit, according to characteristics of the data.

Abstract: A memory system has a storage unit having two or more parallel read/write processing elements and non-volatile data recording areas for a logical block divided into a plurality of logical pages, and a control unit that generates log information for each unit of data written into the recording areas, determines for each logical page a log information recording area from a group of recording areas of the logical page, and controls the parallel operation elements to write the log information generated for a logical page into the log information recording area of the logical page and the data of the logical page into the other recording areas of the group of recording areas of the logical page.

Abstract: According to one embodiment, a semiconductor memory device includes a generator to generate an error correction code. The generator includes a first encoder to calculate a first error correction code, a second encoder to calculate a second correction code, and an operation part to operate the first error correction code and the second error correction code.

Abstract: According to one embodiment, a data storage apparatus includes a write command module, a read command module, and a controller. The write command module is configured to process a write command for writing data to the nonvolatile memories for a plurality of channels, respectively. The read command module is configured to process a read command usually and to process a read command for read modify write (RMW) operation. The controller is configured to control the read command module, causing to execute the read command for the RMW operation, prior to the normal read command, thereby to execute a flush command, and to control the write command module, causing to execute a write flush process that includes the processing of a write command for the RMW operation after the read command for the RMW operation has been executed.

Abstract: According to one embodiment, a data storage apparatus includes an interface module and a controller. The interface module is configured to control rewritable nonvolatile memories provided for the respective channels. The controller is configured to write calibration data to the nonvolatile memories of any channel designated, through the interface module at the same time, in order to perform calibration.

Abstract: According to one embodiment, a memory system comprises a storage areas each having a physical page that is data-write- and read-accessible, the storage areas being divided into a plurality of parallel operation elements capable of performing a parallel operation, and the physical pages of the storage areas being associated with a logical page, a storage unit having a first buffer configured to store data to be rewritten in the storage areas, and a control unit configured to perform data transfer between the storage areas and the storage unit. The control unit comprises a logical page management unit configured to divide the logical page in a predetermined number of parallel operation elements out of the plurality of parallel operation elements, and a system control unit configured to perform a predetermined operation in each of the divided logical pages.

Abstract: According to one embodiment, a data storage apparatus comprises a first controller, a second controller, and a third controller. The first controller controls first write processing of writing data to a flash memory in accordance with a request from a host. The second controller controls second write processing of writing data to the flash memory, the second write processing is different from the first write processing.

Abstract: A memory system has a storage unit having two or more parallel read/write processing elements and non-volatile data recording areas for a logical block divided into a plurality of logical pages, and a control unit that generates log information for each unit of data written into the recording areas, determines for each logical page a log information recording area from a group of recording areas of the logical page, and controls the parallel operation elements to write the log information generated for a logical page into the log information recording area of the logical page and the data of the logical page into the other recording areas of the group of recording areas of the logical page.

Abstract: According to one embodiment, a data storage apparatus includes a write command module, a read command module, and a controller. The write command module is configured to process a write command for writing data to the nonvolatile memories for a plurality of channels, respectively. The read command module is configured to process a read command usually and to process a read command for read modify write (RMW) operation. The controller is configured to control the read command module, causing to execute the read command for the RMW operation, prior to the normal read command, thereby to execute a flush command, and to control the write command module, causing to execute a write flush process that includes the processing of a write command for the RMW operation after the read command for the RMW operation has been executed.

Abstract: According to one embodiment, a data storage apparatus includes an interface module and a controller. The interface module is configured to control rewritable nonvolatile memories provided for the respective channels. The controller is configured to write calibration data to the nonvolatile memories of any channel designated, through the interface module at the same time, in order to perform calibration.