Abstract: The computer executes a first operation by a first recurrence formula, receiving a filter order (positive integer) of a universal maximally flat FIR filter, the number of zeros at z=?1 (integer equal to or more than zero), and a parameter for a group delay at z=1 (rational number). The first recurrence formula includes parameters for the filter order, the number of zeros, and the group delay, and provides coefficients in Bernstein form representation of a transfer function of a universal maximally flat FIR filter. The computer then executes a second operation composed of additions, subtractions, and division by 2 by a second recurrence formula by using a resultant of the first operation as an initial value to extract impulse response coefficients of the universal maximally flat FIR filter from a resultant of the second operation.

Abstract: A FPGA data module to be referred to as a LUT by a logic block (43) is divided into a plurality of modules. Each of a plurality of data registers (41a to 41d) stores one of the plurality of FPGA data modules. By referring to the FPGA data module(s) stored in one or more of the plurality of data registers (41a to 41d), a gate circuit (43a) and flip flop (43b) of the logic block (43) generates a logical function value of logic input data. The logical function value of the logic input data is provided as logic output data.

Abstract: A computing unit (42) executes a second computing in the middle of a first computing. At this time, the hardware structure of the computing unit (42) is switched in accordance with a computing which is a target of execution. A controller (46) stores the internal state of the computing unit (42) in a memory (44) when a computing to be executed by the computing unit (42) changes from the first computing to the second computing. And the controller (46) controls execution of the first computing to be continued by returning the internal state stored in the memory (44) to the computing unit (42), when a computing to be executed by the computing unit (42) returns from the second computing to the first computing.