Patents by Inventor Akinori Sakakibara
Akinori Sakakibara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220278006Abstract: A semiconductor device includes a first insulating circuit board, a semiconductor element on the first insulating circuit board, and an encapsulating body. The first insulating circuit board includes a first insulating substrate, and a first inner conductor layer, and a first outer conductor layer. The first inner conductor layer is electrically connected to a first electrode of the semiconductor element inside of the encapsulating body. The first outer conductor layer is exposed from a surface of the encapsulating body. The first inner conductor layer has a first thin-wall portion a thickness of which reduces toward an outer side, along an outer peripheral edge of the first inner conductor layer with a first width. The first outer conductor layer (i) does not have or (ii) has a second thin-wall portion along the outer peripheral edge of the first outer conductor layer with a second width.Type: ApplicationFiled: May 17, 2022Publication date: September 1, 2022Inventors: Akinori SAKAKIBARA, Takanori KAWASHIMA, Shingo TSUCHIMOCHI, Shoichiro OMAE
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Publication number: 20220270948Abstract: The semiconductor device includes a semiconductor module and a cooler. The semiconductor module includes an insulator substrate, an inner conductor film disposed on a first surface of the insulator substrate, a semiconductor element connected to the inner conductor film, a sealing body sealing the inner conductor film and the semiconductor element, and an outer conductor film disposed on a second surface of the insulator substrate and exposed from a surface of the sealing body. The cooler is disposed adjacent to the outer conductor film via a thermal interface material having fluidity. The outer conductor film has a protruding portion or a recessed portion on a surface being in contact with the thermal interface material.Type: ApplicationFiled: May 10, 2022Publication date: August 25, 2022Inventors: Hiroshi UKEGAWA, Takanori KAWASHIMA, Akinori SAKAKIBARA
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Patent number: 11201099Abstract: A semiconductor device may include a substrate constituted of an insulator; a first conductor film provided on a part of the substrate; a semiconductor chip located on the first conductor film; and an external connection terminal joined to the substrate via a joining layer at a position separated from the first conductor film. The semiconductor chip may be a power semiconductor chip including a main electrode and a signal electrode. The main electrode may be electrically connected to the first conductor film and the signal electrode may be electrically connected to the external connection terminal.Type: GrantFiled: November 25, 2019Date of Patent: December 14, 2021Assignee: DENSO CORPORATIONInventors: Akinori Sakakibara, Takanori Kawashima, Takuya Kadoguchi, Kohji Uramoto, Yasuhiro Ogawa
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Patent number: 11043474Abstract: A semiconductor device may include a first insulated substrate, a first semiconductor chip and a second semiconductor chip disposed on the first insulated substrate, a second insulated substrate opposed to the first insulated substrate with the first semiconductor chip interposed therebetween, and a third insulated substrate opposed to the first insulated substrate with the second semiconductor chip interposed therebetween and located side by side with the second insulated substrate.Type: GrantFiled: April 29, 2019Date of Patent: June 22, 2021Assignee: DENSO CORPORATIONInventors: Shingo Tsuchimochi, Rintaro Asai, Akinori Sakakibara, Masao Noguchi
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Patent number: 10903138Abstract: A semiconductor device includes a substrate constituted of an insulator, a first conductor film provided on a surface of the substrate; a semiconductor chip including a first electrode and a second electrode, the first electrode being connected to the first conductor film; and an external connection terminal including an inner end portion and an outer end portion. The inner end portion is located between the substrate and the semiconductor chip and is connected to the second electrode. The external connection terminal further includes an intermediate portion located between the inner end portion and the outer end portion and joined to the surface of the substrate. A distance between the intermediate portion of the external connection terminal and the substrate is greater than a distance between the inner end portion of the external connection terminal and the substrate.Type: GrantFiled: November 25, 2019Date of Patent: January 26, 2021Assignee: DENSO CORPORATIONInventors: Akinori Sakakibara, Takanori Kawashima
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Publication number: 20200203253Abstract: A semiconductor device includes a substrate constituted of an insulator, a first conductor film provided on a surface of the substrate; a semiconductor chip including a first electrode and a second electrode, the first electrode being connected to the first conductor film; and an external connection terminal including an inner end portion and an outer end portion. The inner end portion is located between the substrate and the semiconductor chip and is connected to the second electrode. The external connection terminal further includes an intermediate portion located between the inner end portion and the outer end portion and joined to the surface of the substrate. A distance between the intermediate portion of the external connection terminal and the substrate is greater than a distance between the inner end portion of the external connection terminal and the substrate.Type: ApplicationFiled: November 25, 2019Publication date: June 25, 2020Applicant: DENSO CORPORATIONInventors: Akinori SAKAKIBARA, Takanori KAWASHIMA
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Publication number: 20200203252Abstract: A semiconductor device may include a substrate constituted of an insulator; a first conductor film provided on a part of the substrate; a semiconductor chip located on the first conductor film; and an external connection terminal joined to the substrate via a joining layer at a position separated from the first conductor film. The semiconductor chip may be a power semiconductor chip including a main electrode and a signal electrode. The main electrode may be electrically connected to the first conductor film and the signal electrode may be electrically connected to the external connection terminal.Type: ApplicationFiled: November 25, 2019Publication date: June 25, 2020Applicant: DENSO CORPORATIONInventors: Akinori SAKAKIBARA, Takanori KAWASHIMA, Takuya KADOGUCHI, Kohji URAMOTO, Yasuhiro OGAWA
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Publication number: 20200066647Abstract: A semiconductor device disclosed herein may include: a semiconductor element; and a stacked substrate on which the semiconductor element is disposed, wherein the stacked substrate includes an insulator substrate, a first conductive layer and a second conductive layer, the first conductive layer being disposed on one side of the insulator substrate, and the second conductive layer being disposed on another side of the insulator substrate, a volume of the second conductive layer is smaller than a volume of the first conductive layer, a material of the insulator substrate has a smaller coefficient of linear thermal expansion and a higher rigidity than a material of the first conductive layer and a material of the second conductive layer, and a protrusion is provided on the one side of the insulator substrate, and the protrusion protrudes along a side surface of the first conductive layer.Type: ApplicationFiled: July 24, 2019Publication date: February 27, 2020Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Ryosuke SHIIZAKI, Akinori SAKAKIBARA, Shingo TSUCHIMOCHI
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Patent number: 10566295Abstract: A semiconductor device includes a semiconductor element, an insulated substrate on which the semiconductor element is located, and an external connection terminal electrically connected to the semiconductor element via the insulated substrate. The insulated substrate includes an insulator layer, an inner conductor layer located on one side of the insulator layer and electrically connected to the semiconductor device, and an outer conductor layer located on the other side of the insulator layer. The external connection terminal includes, along a longitudinal direction of the external connection terminal, a thin section and a thick section that is thicker than the thin section, and the external connection terminal is joined to the inner conductor layer of the insulated substrate at the thin section.Type: GrantFiled: November 27, 2018Date of Patent: February 18, 2020Assignee: Toyota Jidosha Kabushiki KaishaInventor: Akinori Sakakibara
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Publication number: 20190385985Abstract: A semiconductor device may include a first insulated substrate, a first semiconductor chip and a second semiconductor chip disposed on the first insulated substrate, a second insulated substrate opposed to the first insulated substrate with the first semiconductor chip interposed therebetween, and a third insulated substrate opposed to the first insulated substrate with the second semiconductor chip interposed therebetween and located side by side with the second insulated substrate.Type: ApplicationFiled: April 29, 2019Publication date: December 19, 2019Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Shingo TSUCHIMOCHI, Rintaro ASAI, Akinori SAKAKIBARA, Masao NOGUCHI
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Publication number: 20190164913Abstract: A semiconductor device includes a semiconductor element, an insulated substrate on which the semiconductor element is located, and an external connection terminal electrically connected to the semiconductor element via the insulated substrate. The insulated substrate includes an insulator layer, an inner conductor layer located on one side of the insulator layer and electrically connected to the semiconductor device, and an outer conductor layer located on the other side of the insulator layer. The external connection terminal includes, along a longitudinal direction of the external connection terminal, a thin section and a thick section that is thicker than the thin section, and the external connection terminal is joined to the inner conductor layer of the insulated substrate at the thin section.Type: ApplicationFiled: November 27, 2018Publication date: May 30, 2019Inventor: Akinori Sakakibara
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Patent number: 10269753Abstract: The manufacturing method of a semiconductor device includes applying a conductive paste containing metal particles to a specified area in an electrode plate including a recess in a surface of the electrode plate, the specified area being adjacent to the recess. The manufacturing method of a semiconductor device includes placing a semiconductor chip on the conductive paste so that an outer peripheral edge of the semiconductor chip is located above the recess. The manufacturing method of a semiconductor device includes hardening the conductive paste by heating the conductive paste while applying pressure to the semiconductor chip in a direction toward the electrode plate.Type: GrantFiled: December 19, 2017Date of Patent: April 23, 2019Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventor: Akinori Sakakibara
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Publication number: 20180197833Abstract: The manufacturing method of a semiconductor device includes applying a conductive paste containing metal particles to a specified area in an electrode plate including a recess in a surface of the electrode plate, the specified area being adjacent to the recess. The manufacturing method of a semiconductor device includes placing a semiconductor chip on the conductive paste so that an outer peripheral edge of the semiconductor chip is located above the recess. The manufacturing method of a semiconductor device includes hardening the conductive paste by heating the conductive paste while applying pressure to the semiconductor chip in a direction toward the electrode plate.Type: ApplicationFiled: December 19, 2017Publication date: July 12, 2018Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventor: Akinori SAKAKIBARA
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Patent number: 9806000Abstract: A bonding member is a member shaped in a sheet and made of electrically-insulating resin. A semiconductor module includes a heatsink and a cooler that are electrically insulated from each other by the bonding member. The bonding member includes a central portion and a peripheral portion. A heat conductivity in a normal direction of the central portion is greater than a heat conductivity in the normal direction of the peripheral portion. Further, a heat conductivity in a surface direction of the peripheral portion is greater than a heat conductivity in the surface direction of the central portion. Further, the heat conductivity in the normal direction of the central portion is greater than the heat conductivity in the surface direction of the central portion.Type: GrantFiled: July 22, 2016Date of Patent: October 31, 2017Assignee: Toyota Jidosha Kabushiki KaishaInventor: Akinori Sakakibara
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Publication number: 20170025323Abstract: A bonding member is a member shaped in a sheet and made of electrically-insulating resin. A semiconductor module includes a heatsink and a cooler that are electrically insulated from each other by the bonding member. The bonding member includes a central portion and a peripheral portion. A heat conductivity in a normal direction of the central portion is greater than a heat conductivity in the normal direction of the peripheral portion. Further, a heat conductivity in a surface direction of the peripheral portion is greater than a heat conductivity in the surface direction of the central portion. Further, the heat conductivity in the normal direction of the central portion is greater than the heat conductivity in the surface direction of the central portion.Type: ApplicationFiled: July 22, 2016Publication date: January 26, 2017Inventor: Akinori Sakakibara
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Patent number: 9412826Abstract: A method for manufacturing a semiconductor device includes processes of: (a) implant first conductivity type first impurities in a first region of a first surface; (b) form a second conductivity type semiconductor region exposed in the second region of the first surface by implanting second conductivity type second impurities in the second region; (c) implant charged particles at a dose amount larger than those of the first and the second impurities in a third region of the first surface which at least partially overlaps with the first region and is adjacent to the second region so that an implantation depth of the charged particles becomes shallower than that of the first impurities. After having performed the processes of (a) to (c), a metal is deposited on the second and the third regions, and the metal is caused to react with the semiconductor substrate to form the silicide layer.Type: GrantFiled: February 2, 2015Date of Patent: August 9, 2016Assignee: Toyota Jidosha Kabushiki KaishaInventor: Akinori Sakakibara
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Patent number: 9385188Abstract: A semiconductor device which can suppress the influence of the external electric charge and can be efficiently manufactured is provided. The semiconductor device is provided with an active region in which a semiconductor element is disposed and a termination region between the active region and an edge surface of the semiconductor substrate. An insulating layer is disposed on at least a part of an upper surface of the termination region. A plurality of floating electrodes is disposed at an interval in the insulating layer in a direction from the active region toward the edge surface of the semiconductor substrate, and a width of the plurality of floating electrodes in a thickness direction of the semiconductor substrate is greater than a width of the plurality of floating electrodes in the direction from the active region toward the edge surface of the semiconductor substrate.Type: GrantFiled: November 27, 2012Date of Patent: July 5, 2016Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yasuhiro Hirabayashi, Akinori Sakakibara
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Publication number: 20150228736Abstract: A method for manufacturing a semiconductor device includes processes of: (a) implant first conductivity type first impurities in a first region of a first surface; (b) form a second conductivity type semiconductor region exposed in the second region of the first surface by implanting second conductivity type second impurities in the second region; (c) implant charged particles at a dose amount larger than those of the first and the second impurities in a third region of the first surface which at least partially overlaps with the first region and is adjacent to the second region so that an implantation depth of the charged particles becomes shallower than that of the first impurities. After having performed the processes of (a) to (c), a metal is deposited on the second and the third regions, and the metal is caused to react with the semiconductor substrate to form the silicide layer.Type: ApplicationFiled: February 2, 2015Publication date: August 13, 2015Applicant: Toyota Jidosha Kabushiki KaishaInventor: Akinori Sakakibara
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Publication number: 20140374871Abstract: A semiconductor device which can suppress the influence of the external electric charge and can be efficiently manufactured is provided. The semiconductor device is provided with an active region in which a semiconductor element is disposed and a termination region between the active region and an edge surface of the semiconductor substrate. An insulating layer is disposed on at least a part of an upper surface of the termination region. A plurality of floating electrodes is disposed at an interval in the insulating layer in a direction from the active region toward the edge surface of the semiconductor substrate, and a width of the plurality of floating electrodes in a thickness direction of the semiconductor substrate is greater than a width of the plurality of floating electrodes in the direction from the active region toward the edge surface of the semiconductor substrate.Type: ApplicationFiled: November 27, 2012Publication date: December 25, 2014Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yasuhiro Hirabayashi, Akinori Sakakibara