Patents by Inventor Akinori Seki
Akinori Seki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110287626Abstract: The invention provides an ohmic electrode of a p-type SiC semiconductor element, which includes an ohmic electrode layer that is made of Ti3SiC2, and that is formed directly on a surface of a p-type SiC semiconductor. The invention also provides a method of forming an ohmic electrode of a p-type SiC semiconductor element. The ohmic electrode includes an ohmic electrode layer that is made of Ti3SiC2, and that is formed directly on a surface of a p-type SiC semiconductor. The method includes forming a ternary mixed film that includes Ti, Si, and C in a manner such that an atomic composition ratio, Ti:Si:C is 3:1:2, on a surface of a p-type SiC semiconductor to produce a laminated film; and annealing the produced laminated film under vacuum or under an inert gas atmosphere.Type: ApplicationFiled: January 29, 2010Publication date: November 24, 2011Inventors: Akinori Seki, Masahiro Sugimoto, Akira Kawahashi, Yasuo Takahashi, Masakatsu Maeda
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Patent number: 8053784Abstract: A channel layer (40) for forming a portion of a carrier path between a source electrode (100) and a drain electrode (110) is formed on a drift layer (30). The channel layer (40) includes Ge granular crystals formed on the drift layer (30), and a cap layer covering the Ge granular crystals.Type: GrantFiled: August 7, 2007Date of Patent: November 8, 2011Assignees: Toyota Jidosha Kabushiki Kaisha, Japan Fine Ceramics CenterInventors: Akinori Seki, Yukari Tani, Noriyoshi Shibata
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Publication number: 20110210341Abstract: A p-type SiC semiconductor includes a SiC crystal that contains Al and Ti as impurities, wherein the atom number concentration of Ti is equal to or less than the atom number concentration of Al. It is preferable that the concentration of Al and the concentration of Ti satisfy the following relations: (Concentration of Al)?5×1018/cm3; and 0.01%?(Concentration of Ti)/(Concentration of Al)?20%. It is more preferable that the concentration of Al and the concentration of Ti satisfy the following relations: (Concentration of Al)?5×1018/cm3; and 1×1017/cm3?(Concentration of Ti)?1×1018/cm3.Type: ApplicationFiled: November 19, 2009Publication date: September 1, 2011Inventors: Hiroaki Saitoh, Akinori Seki, Tsunenobu Kimoto
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Patent number: 8008180Abstract: A method of forming an Ohmic contact on a P-type 4H—SiC and an Ohmic contact formed by the same are provided. A method of forming an Ohmic contact on a P-type 4H—SiC substrate including a deposition step of successively depositing a 1 to 60 nm thick first Al layer, Ti layer, and second Al layer on a P-type 4H—SiC substrate and an alloying step of forming an alloy layer between the SiC substrate and the Ti layer through the first Al layer by heat treatment in a nonoxidizing atmosphere. An Ohmic contact on a P-type 4H—SiC substrate formed by this method is also provided.Type: GrantFiled: March 13, 2008Date of Patent: August 30, 2011Assignees: Toyota Jidosha Kabushiki Kaisha, Osaka UniversityInventors: Yasuo Takahashi, Masakatsu Maeda, Akinori Seki, Akira Kawahashi, Masahiro Sugimoto
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Patent number: 7879705Abstract: A method is set forth of forming an ohmic electrode having good characteristics on a SiC semiconductor layer. In the method, a Ti-layer and an Al-layer are formed on a surface of the SiC substrate. The SiC substrate having the Ti-layer and the Al-layer is maintained at a temperature that is higher than or equal to a first temperature and lower than a second temperature until all Ti in the Ti-layer has reacted with Al. The first temperature is the minimum temperature of a temperature zone at which the Ti reacts with the Al to form Al3Ti, and the second temperature is the minimum temperature of a temperature zone at which the Al3Ti reacts with SiC to form Ti3SiC2. As a result of this maintaining of temperature step, an Al3Ti-layer is formed on the surface of the SiC substrate. The method also comprises further heating the SiC substrate having the Al3Ti-layer to a temperature that is higher than the second temperature.Type: GrantFiled: September 21, 2007Date of Patent: February 1, 2011Assignee: Toyota Jidosha Kabushiki KaishaInventors: Akira Kawahashi, Masahiro Sugimoto, Akinori Seki, Masakatsu Maeda, Yasuo Takahashi
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Publication number: 20100308344Abstract: In a method for growing a p-type SiC semiconductor single crystal on a SiC single crystal substrate, using a first solution in which C is dissolved in a melt of Si, a second solution is prepared by adding Al and N to the first solution such that an amount of Al added is larger than that of N added, and the p-type SiC semiconductor single crystal is grown on the SiC single crystal substrate from the second solution. A p-type SiC semiconductor single crystal is provided which is grown by the method as described above, and which contains 1×1020 cm?3 of Al and 2×1018 to 7×1018 cm?3 of N as impurities.Type: ApplicationFiled: January 28, 2009Publication date: December 9, 2010Inventors: Akinori Seki, Yasuyuki Fujiwara
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Publication number: 20100224884Abstract: A channel layer (40) for forming a portion of a carrier path between a source electrode (100) and a drain electrode (110) is formed on a drift layer (30). The channel layer (40) includes Ge granular crystals formed on the drift layer (30), and a cap layer covering the Ge granular crystals.Type: ApplicationFiled: August 7, 2007Publication date: September 9, 2010Inventors: Akinori Seki, Yukari Tani, Noriyoshi Shibata
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Publication number: 20100102332Abstract: A method of forming an Ohmic contact on a P-type 4H—SiC and an Ohmic contact formed by the same are provided. A method of forming an Ohmic contact on a P-type 4H—SiC substrate including a deposition step of successively depositing a 1 to 60 nm thick first Al layer, Ti layer, and second Al layer on a P-type 4H—SiC substrate and an alloying step of forming an alloy layer between the SiC substrate and the Ti layer through the first Al layer by heat treatment in a nonoxidizing atmosphere. An Ohmic contact on a P-type 4H—SiC substrate formed by this method is also provided.Type: ApplicationFiled: March 13, 2008Publication date: April 29, 2010Applicants: OSAKA UNIVERSITY, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yasuo Takahashi, Masakatsu Maeda, Akinori Seki, Akira Kawahashi, Masahiro Sugimoto
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Patent number: 7678671Abstract: A semiconductor material having a stepwise surface structure of (0001)-plane terraces and (11-2n)-plane steps [n?0] on the SiC substrate, a semiconductor device using the same and a method of producing the semiconductor material in which a carbon-rich surface is formed on the SiC substrate prior to epitaxial growth of an SiC crystal, the carbon-rich surface satisfies the ratio R=(I284.5/I282.8)>0.2, wherein I282.8 (ISiC) is an integrated intensity of a C1s signal having a peak at the binding energy relating to stoichiometric SiC (in the region of 282.8 eV), and I284.5 (IC) is an integrated intensity of a C1s signal having a peak at the binding energy relating to graphite, SiCx (x>1), or SiyCH1-y (y<1) (in the region of 284.5 eV), as measured by an X-ray photoelectron spectroscopic analyzer (XPS).Type: GrantFiled: October 26, 2006Date of Patent: March 16, 2010Assignees: Toyota Jidosha Kabushiki Kaisha, Japan Fine Ceramics CenterInventors: Akinori Seki, Yukari Tani, Noriyoshi Shibata
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Publication number: 20090233435Abstract: A method is set forth of forming an ohmic electrode having good characteristics on a SiC semiconductor layer. In the method, a Ti-layer and an Al-layer are formed on a surface of the SiC substrate. The SiC substrate having the Ti-layer and the Al-layer is maintained at a temperature that is higher than or equal to a first temperature and lower than a second temperature until all Ti in the Ti-layer has reacted with Al. The first temperature is the minimum temperature of a temperature zone at which the Ti reacts with the Al to form Al3Ti, and the second temperature is the minimum temperature of a temperature zone at which the Al3Ti reacts with SiC to form Ti3SiC2. As a result of this maintaining of temperature step, an Al3Ti-layer is formed on the surface of the SiC substrate. The method also comprises further heating the SiC substrate having the Al3Ti-layer to a temperature that is higher than the second temperature.Type: ApplicationFiled: September 21, 2007Publication date: September 17, 2009Inventors: Akira Kawahashi, Masahiro Sugimoto, Akinori Seki, Masakatsu Maeda, Yasuo Takahashi
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Publication number: 20070096109Abstract: A semiconductor material having a stepwise surface structure of (0001)-plane terraces and (11-2n)-plane steps [n?0] on the SiC substrate, a semiconductor device using the same and a method of producing the semiconductor material in which a carbon-rich surface is formed on the SiC substrate prior to epitaxial growth of an SiC crystal, the carbon-rich surface satisfies the ratio R=(I284.5/I282.8)>0.2, wherein I282.8 (ISiC) is an integrated intensity of a C1s signal having a peak at the binding energy relating to stoichiometric SiC (in the region of 282.8 eV), and I284.5 (IC) is an integrated intensity of a C1s signal having a peak at the binding energy relating to graphite, SiCx (x>1), or SiyCH1-y (y<1) (in the region of 284.5 eV), as measured by an X-ray photoelectron spectroscopic analyzer (XPS).Type: ApplicationFiled: October 26, 2006Publication date: May 3, 2007Inventors: Akinori Seki, Yukari Tani, Noriyoshi Shibata
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Publication number: 20070032053Abstract: The present invention provides a method of producing a silicon carbide semiconductor substrate in which a silicon carbide buffer layer doped with germanium and a semiconductor device layer are sequentially laminated on the buffer layer, a silicon carbide semiconductor substrate obtained by the method and a silicon carbide semiconductor in which electrodes are disposed on the silicon carbide semiconductor substrate.Type: ApplicationFiled: October 16, 2006Publication date: February 8, 2007Inventors: Akinori Seki, Yukari Tani, Noriyoshi Shibata
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Patent number: 5994725Abstract: A semiconductor device having a Schottky gate and a bipolar device. A semiconductor substrate has a surface layer in ohmic contact with the conductor and the deeper layer in Schottky contact with the conductor. The substrate has a recess which reaches into the deeper layer. A conductor field extends from the bottom of the recess in a direction perpendicular to the bottom. Insulating films are formed on both vertical surfaces of the conductor film. Another conductor film is formed across the top of the first conductor film and both insulating films. Conductor films are formed on the surface of the substrate on either side of the insulating films. In this device, the electrode length/width is reduced and the response to the element is improved. Further, because the second conductor film is formed on the first conductor film, it is possible to reduce the gate electrode and the base electrode.Type: GrantFiled: January 6, 1998Date of Patent: November 30, 1999Assignee: Toyota Jidosha Kabushiki KaishaInventors: Toyokazu Ohnishi, Akinori Seki
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Patent number: 5773334Abstract: A semiconductor device is manufactured by a process comprising the steps of forming a cover film on a surface of a semiconductor substrate such that the cover film exposes a portion of the surface, covers a remaining portion thereof and has an edge along a boundary between the exposed portion and the covered portion, forming a first conductor film in a range from the cover film formed in the cover film forming step through the edge to the exposed surface portion of the semiconductor substrate, removing the first conductor film formed in the first conductor film forming step other than a portion formed along the edge such that the first conductor film is left along the edge, forming an insulating film on the opposite sides of the first conductor film left along the edge in the removing step such that a top edge of the left first conductor film is exposed, and forming a second conductor film on the surface of the insulating film formed in the insulating film forming step along the exposed top edge of the firstType: GrantFiled: September 21, 1995Date of Patent: June 30, 1998Assignee: Toyota Jidosha Kabushiki KaishaInventors: Toyokazu Ohnishi, Akinori Seki
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Patent number: 5604761Abstract: A semiconductor laser having a plurality of semiconductor laser chips laminated by solder layers which cause no interference with laser beams is provided. To this end, each of the semiconductor laser chips has a solder sump recess formed in the surface to be soldered at an end adjacent to a laser beam radiating surface and extending through portions of the chip except an active layer.Type: GrantFiled: October 14, 1994Date of Patent: February 18, 1997Assignee: Toyota Jidosha Kabushiki KaishaInventors: Akinori Seki, Toyokazu Ohnishi, Jiro Nakano, Takahide Sugiyama, Kazuyoshi Tomita, Hiroyuki Kano
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Patent number: 5553089Abstract: A semiconductor laser includes a semiconductor laser chip stack having active layers formed substantially in the central portion thereof in the stacking direction and a pair of opposed reflecting surfaces formed at both ends of the active layers. A convex lens of a light transmissible material fixedly attached to a partially light transmissible reflecting surface of the pair of reflecting surfaces and adapted for converging a laser beam emitted from the partially light transmissible reflecting surface.Type: GrantFiled: October 18, 1994Date of Patent: September 3, 1996Assignee: Toyota Jidosha Kabushiki KaishaInventors: Akinori Seki, Toyokazu Ohnishi, Jiro Nakano
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Patent number: 5491106Abstract: A method for growing a compound semiconductor layer of Al.sub.x Ga.sub.1-x As (0.ltoreq.x.ltoreq.1) on a compound semiconductor substrate uses a molecular beam epitaxial apparatus, the method including the steps of providing the substrate having a GaAs layer on an upper surface thereof, thermally etching the GaAs layer by heating the substrate at a temperature and irradiating the GaAs layer with a gallium molecular beam and an arsenic molecular beam to expose the upper surface of the substrate, and growing the Al.sub.x Ga.sub.1-x As (0.ltoreq.x.ltoreq.1) layer on the upper surface of the substrate.Type: GrantFiled: July 23, 1993Date of Patent: February 13, 1996Assignee: Sharp Kabushiki KaishaInventors: Akinori Seki, Hiroyuki Hosoba, Toshio Hata, Masafumi Kondo, Takahiro Suyama, Sadayoshi Matsui
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Patent number: 5452316Abstract: A semiconductor laser includes a first one-conductive type clad layer, a first active layer, a second other-conductive type clad layer, a third one-conductive type clad layer, a second active layer, and a fourth other-conductive type clad layer stacked in sequence. Either the second other-conductive type clad layer or the third one-conductive type clad layer has a thickness smaller than the thickness of a depletion layer of the p-n junction grown at the boundary between the second other-conductive type clad layer and the third one-conductive type clad layer when voltage is applied across the first one-conductive type clad layer and the fourth other-conductive type clad layer.Type: GrantFiled: September 23, 1994Date of Patent: September 19, 1995Assignee: Toyota Jidosha Kabushiki KaishaInventors: Akinori Seki, Toyokazu Ohnishi, Jiro Nakano
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Patent number: 5365536Abstract: A semiconductor laser for radiating a laser beam when current flows in the forward direction includes a first laser structure, a tunnel diode structure and a second laser structure in sequence, the forward direction of the first laser structure and the second laser structure being coincident with the forward direction of the semiconductor laser, the forward direction of the tunnel diode structure being opposite to the forward direction of the semiconductor laser.Type: GrantFiled: July 20, 1993Date of Patent: November 15, 1994Assignee: Toyota Jidosha Kabushiki KaishaInventor: Akinori Seki
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Patent number: 5111470Abstract: A semiconductor laser device is provided which includes a semiconductor substrate and a multi-layered structure disposed on the substrate, the multi-layered structure containing an Al.sub.x Ga.sub.1-x As (0<x<1) first cladding layer formed on the substrate, an Al.sub.y Ga.sub.1-y As (0<y<1, x>y) active layer for laser oscillation formed on the first cladding layer, an Al.sub.x Ga.sub.1-x As (0<x<1) second cladding layer formed on the active layer, and an Al.sub.z Ga.sub.1-z As (0<z<1) current blocking layer formed above the second cladding layer, the current blocking layer having a striped groove as a current injection path. The method includes the steps of: forming a multi-layered structure on a semiconductor substrate, the multi-layered structure containing in order, an Al.sub.x Ga.sub.1-x As (0<x<1) first cladding layer, an Al.sub.y Ga.sub.Type: GrantFiled: April 12, 1991Date of Patent: May 5, 1992Assignee: Sharp Kabushiki KaishaInventors: Hiroyuki Hosoba, Akinori Seki, Toshio Hata, Masafumi Kondou, Takahiro Suyama, Sadayoshi Matsui