Patents by Inventor Akio Hirakawa

Akio Hirakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7034392
    Abstract: A filter chip lying on an upper surface of a top layer package substrate is connected to an upper surface ground electrode (235). The upper ground electrode (235) and a lower surface ground electrode (237) are connected to each other via through electrodes (261, 262, 263), ground wiring patterns (251, 252), first connecting lines (271 to 276), and second connecting lines (281, 282). The first connecting lines (271 to 276) are connected to the ground wiring patterns (251, 252), whereas the second connecting lines (281, 282) are not connected to the ground wiring patterns (251, 252), respectively. Owing to the provision of the connecting lines connected to the ground wiring patterns (251, 252) and the connecting lines unconnected to the ground wiring patterns (251, 252), the impedance between a multilayer package substrate and ground can be adjusted.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: April 25, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Akio Hirakawa, Yoshiaki Fujita, Tomokazu Komazaki
  • Publication number: 20050104203
    Abstract: A filter chip lying on an upper surface of a top layer package substrate is connected to an upper surface ground electrode (235). The upper ground electrode (235) and a lower surface ground electrode (237) are connected to each other via through electrodes (261, 262, 263), ground wiring patterns (251, 252), first connecting lines (271 to 276), and second connecting lines (281, 282). The first connecting lines (271 to 276) are connected to the ground wiring patterns (251, 252), whereas the second connecting lines (281, 282) are not connected to the ground wiring patterns (251, 252), respectively. Owing to the provision of the connecting lines connected to the ground wiring patterns (251, 252) and the connecting lines unconnected to the ground wiring patterns (251, 252), the impedance between a multilayer package substrate and ground can be adjusted.
    Type: Application
    Filed: July 8, 2004
    Publication date: May 19, 2005
    Applicant: Oki Electric Industry Co., Ltd.
    Inventors: Akio Hirakawa, Yoshiaki Fujita, Tomokazu Komazaki
  • Patent number: 6087194
    Abstract: Composite units of an optical semiconductor device and a supporting substrate are disclosed, in which the rear surface of the optical semiconductor device is provided with one or more electrode patterns and the top surface of the supporting substrate is provided with one or more electrode patterns. The optical semiconductor device and the supporting substrate are fixed to each other by once melting and solidifying one or more solder bumps which intervene between the one or more electrode patterns provided on the rear surface of the optical semiconductor device and the one or more electrode patterns provided on the top surface of the supporting substrate. A good grade of accuracy in the mutual geometric position of the optical semiconductor device and the supporting substrate is obtained in a horizontal direction due to a phenomenon called "the self alignment results" in this specification, in which a molten metal is inclined to become a ball based on surface tension.
    Type: Grant
    Filed: October 29, 1997
    Date of Patent: July 11, 2000
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Hisao Matsukura, Yasuhiko Kudou, Hajime Hotta, Akio Hirakawa, Masaki Sugawara, Jiro Utsunomiya, Kiyoshi Kurosawa