Patents by Inventor Akio Ishizu

Akio Ishizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7168161
    Abstract: In a method of manufacturing a camera module having a CMOS image sensor, a semiconductor chip to serve as a light sensor is mounted on a optical-component-mounting face of a wiring substrate mother board and, after bonding wires are connected to the semiconductor chip, a lens barrel is joined to the wiring substrate mother board so as to cover the semiconductor chip. A position adjustment pin and a through hole are provided on the lens barrel and the wiring substrate mother board respectively outside a junction face between the lens barrel and the wiring substrate mother board to be used for adjusting the position of the lens barrel with respect to the wiring substrate mother board by inserting the position adjustment pin into the through hole.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: January 30, 2007
    Assignees: Renesas Technology Corp., Renesas Eastern Japan Semiconductor Inc.
    Inventors: Kenji Hanada, Akio Ishizu
  • Publication number: 20060248715
    Abstract: In a method of manufacturing a camera module having a CMOS image sensor, a semiconductor chip to serve as a light sensor is mounted on a optical-component-mounting face of a wiring substrate mother board and, after bonding wires are connected to the semiconductor chip, a lens barrel is joined to the wiring substrate mother board so as to cover the semiconductor chip. A position adjustment pin and a through hole are provided on the lens barrel and the wiring substrate mother board respectively outside a junction face between the lens barrel and the wiring substrate mother board to be used for adjusting the position of the lens barrel with respect to the wiring substrate mother board by inserting the position adjustment pin into the through hole.
    Type: Application
    Filed: July 5, 2006
    Publication date: November 9, 2006
    Inventors: Kenji Hanada, Akio Ishizu
  • Publication number: 20050250254
    Abstract: A method of manufacturing a semiconductor device able to reduce the number of manufacturing steps and attain the rationalization of a manufacturing line is disclosed. The semiconductor device is a high-frequency module assembled by mounting chip parts (22) and semiconductor pellets (21) onto each of wiring substrates (2) formed on a matrix substrate (27) after inspection. A defect mark (2e) is affixed to a wiring substrate (2) as a block judged to be defective in the inspection of the matrix substrate (27), then in a series of subsequent assembling steps the defect mark (e) is recognized and the assembling work for the wiring substrate (2) with the defect mark (2e) thereon is omitted to attain the rationalization of a manufacturing line.
    Type: Application
    Filed: July 12, 2005
    Publication date: November 10, 2005
    Inventors: Akio Ishizu, Kazutoshi Takashima, Shiro Oba, Yoshihiko Kobayashi, Tsutomu Ida, Shigeru Haga, Susumu Takada, Iwamichi Koujiro, Norinaga Arai, Yuji Kakegawa
  • Patent number: 6946306
    Abstract: A method of manufacturing a semiconductor device able to reduce the number of manufacturing steps and attain the rationalization of a manufacturing line is disclosed. The semiconductor device is a high-frequency module assembled by mounting chip parts (22) and semiconductor pellets (21) onto each of wiring substrates (2) formed on a matrix substrate (27) after inspection. A defect mark (2e) is affixed to a wiring substrate (2) as a block judged to be defective in the inspection of the matrix substrate (27), then in a series of subsequent assembling steps the defect mark (e) is recognized and the assembling work for the wiring substrate (2) with the defect mark (2e) thereon is omitted to attain the rationalization of a manufacturing line.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: September 20, 2005
    Assignees: Renesas Technology Corp., Hitachi Tohbu Semiconductor, Ltd.
    Inventors: Akio Ishizu, Kazutoshi Takashima, Shiro Oba, Yoshihiko Kobayashi, Tsutomu Ida, Shigeru Haga, Susumu Takada, Iwamichi Koujiro, Norinaga Arai, Yuji Kakegawa
  • Publication number: 20050064612
    Abstract: A method of manufacturing a semiconductor device able to reduce the number of manufacturing steps and attain the rationalization of a manufacturing line is disclosed. The semiconductor device is a high-frequency module assembled by mounting chip parts (22) and semiconductor pellets (21) onto each of wiring substrates (2) formed on a matrix substrate (27) after inspection. A defect mark (2e) is affixed to a wiring substrate (2) as a block judged to be defective in the inspection of the matrix substrate (27), then in a series of subsequent assembling steps the defect mark (e) is recognized and the assembling work for the wiring substrate (2) with the defect mark (2e) thereon is omitted to attain the rationalization of a manufacturing line.
    Type: Application
    Filed: November 9, 2004
    Publication date: March 24, 2005
    Inventors: Akio Ishizu, Kazutoshi Takashima, Shiro Oba, Yoshihiko Kobayashi, Tsutomu Ida, Shigeru Haga, Susumu Takada, Iwamichi Koujiro, Norinaga Arai, Yuji Kakegawa
  • Publication number: 20050048692
    Abstract: In a method of manufacturing a camera module having a CMOS image sensor, a semiconductor chip to serve as a light sensor is mounted on a optical-component-mounting face of a wiring substrate mother board and, after bonding wires are connected to the semiconductor chip, a lens barrel is joined to the wiring substrate mother board so as to cover the semiconductor chip. A position adjustment pin and a through hole are provided on the lens barrel and the wiring substrate mother board respectively outside a junction face between the lens barrel and the wiring substrate mother board to be used for adjusting the position of the lens barrel with respect to the wiring substrate mother board by inserting the position adjustment pin into the through hole.
    Type: Application
    Filed: September 11, 2003
    Publication date: March 3, 2005
    Inventors: Kenji Hanada, Akio Ishizu
  • Patent number: 6852553
    Abstract: A method of manufacturing a semiconductor device able to reduce the number of manufacturing steps and attain the rationalization of a manufacturing line is disclosed. The semiconductor device is a high-frequency module assembled by mounting chip parts (22) and semiconductor pellets (21) onto each of wiring substrates (2) formed on a matrix substrate (27) after inspection. A defect mark (2e) is affixed to a wiring substrate (2) as a block judged to be defective in the inspection of the matrix substrate (27), then in a series of subsequent assembling steps the defect mark (e) is recognized and the assembling work for the wiring substrate (2) with the defect mark (2e) thereon is omitted to attain the rationalization of a manufacturing line.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: February 8, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Akio Ishizu, Kazutoshi Takashima, Shiro Oba, Yoshihiko Kobayashi, Tsutomu Ida, Shigeru Haga, Susumu Takada, Iwamichi Koujiro, Norinaga Arai, Yuji Kakegawa
  • Patent number: 6709890
    Abstract: In a method of manufacturing a high frequency module to be assembled by providing, on a wiring board, a chip part and a semiconductor pellet to be bare chip mounted and then mounting the chip part and the semiconductor pellet through soldering, the wiring board is separated from a heat block with the semiconductor pellet pressurized against the wiring board in a main heating portion heating and melting a reflow solder, thereby cooling a soldering portion. Consequently, the generation of a void in the soldering portion can be prevented and the connecting reliability of the soldering portion can be enhanced. In addition, a degree of mounting horizontality of the semiconductor pellet on the wiring board can be enhanced.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: March 23, 2004
    Assignees: Renesas Technology Corporation, Hitachi Tobu Semiconductor Ltd.
    Inventors: Tsutomu Ida, Akio Ishizu, Masakazu Hashizume, Isao Hagiwara, Yoshinori Shiokawa
  • Publication number: 20030003622
    Abstract: A method of manufacturing a semiconductor device able to reduce the number of manufacturing steps and attain the rationalization of a manufacturing line is disclosed. The semiconductor device is a high-frequency module assembled by mounting chip parts (22) and semiconductor pellets (21) onto each of wiring substrates (2) formed on a matrix substrate (27) after inspection. A defect mark (2e) is affixed to a wiring substrate (2) as a block judged to be defective in the inspection of the matrix substrate (27), then in a series of subsequent assembling steps the defect mark (e) is recognized and the assembling work for the wiring substrate (2) with the defect mark (2e) thereon is omitted to attain the rationalization of a manufacturing line.
    Type: Application
    Filed: May 3, 2002
    Publication date: January 2, 2003
    Inventors: Akio Ishizu, Kazutoshi Takashima, Shiro Oba, Yoshihiko Kobayashi, Tsutomu Ida, Shigeru Haga, Susumu Takada, Iwamichi Koujiro, Norinaga Arai, Yuji Kakegawa
  • Publication number: 20010014490
    Abstract: In a method of manufacturing a high frequency module to be assembled by providing, on a wiring board, a chip part and a semiconductor pellet to be bare chip mounted and then mounting the chip part and the semiconductor pellet through soldering, the wiring board is separated from a heat block with the semiconductor pellet pressurized against the wiring board in a main heating portion heating and melting a reflow solder, thereby cooling a soldering portion. Consequently, the generation of a void in the soldering portion can be prevented and the connecting reliability of the soldering portion can be enhanced. In addition, a degree of mounting horizontality of the semiconductor pellet on the wiring board can be enhanced.
    Type: Application
    Filed: February 15, 2001
    Publication date: August 16, 2001
    Inventors: Tsutomu Ida, Akio Ishizu, Masakazu Hashizume, Isao Hagiwara, Yoshinori Shiokawa