Patents by Inventor Akio Iwase

Akio Iwase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050168106
    Abstract: The invention provides a laminate-type piezoelectric element comprising a ceramic laminate 10 with ceramic layers 11 and internal electrode layers 12 respectively stacked alternately, and a pair of external electrodes respectively connecting with a pair of connecting areas 15 formed at an outer peripheral area of the ceramic laminate 10. The internal electrode layer comprises an internal electrode part 120 with electric conductivity, and a non-pole part 120 where the internal electrode part 120 does not exist at the inside near an outer peripheral area. The ceramic laminate 10 comprises stress relaxation parts 13 able to modify more easily their shapes than the ceramic layers 11, along at least a part of said internal electrode layers. This stress relaxation part 13 is placed so as to overlap with the non-pole part 129 of either of the internal electrode layers 12, in a stacking direction of the ceramic laminate 10.
    Type: Application
    Filed: February 1, 2005
    Publication date: August 4, 2005
    Applicant: DENSO CORPORATION
    Inventors: Akio Iwase, Tetsuji Ito, Toshio Ooshima, Shige Kadotani
  • Publication number: 20040255443
    Abstract: This invention is directed to providing a method for producing a stacked piezoelectric element, where grooves can be easily formed on the side face of a stacked body without causing damage.
    Type: Application
    Filed: June 2, 2004
    Publication date: December 23, 2004
    Applicant: DENSO CORPORATION
    Inventors: Akio Iwase, Tetsuji Itou, Toshio Ooshima, Shige Kadotani
  • Patent number: 6805763
    Abstract: This invention provides a stacked ceramic body in which de-lamination (inter-layer peeling) does not easily occur, and a production method thereof. In the invention, a predetermined number of unit layers 151 and 152 each including a ceramic layer 111 112, an internal electrode layer 121, 122, a spacer 131, 132 having substantially the same thickness as the internal electrode layer 121, 122 and adhesive layers 14 stacked on the surface of the internal electrode layer and on the surface of the adhesive layer are stacked. A print portion for the internal electrode layer 121, 122 and a print portion for the spacer 131, 132 are formed on a green sheet for the ceramic layer 111, 112, and print portions for the adhesive layer 14 are formed on both of them to give an unsintered unit. The unsintered units are stacked to give an unsintered stacked body, are press-bonded and are then sintered.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: October 19, 2004
    Assignee: Denso Corporation
    Inventors: Akio Iwase, Yukihisa Takeuchi, Tetuji Ito
  • Publication number: 20040183396
    Abstract: A lamination-type piezoelectric element (1) comprises: a ceramic laminated body (10) in which ceramic layers and inner electrode layers (12) are alternately laminated on each other; and a pair of outer electrodes (18) respectively joined to a pair of joining faces (15) formed on an outer circumferential face of the ceramic laminated body (10). A belt-shaped outer circumferential groove portion (120) coming into contact with an outer circumferential end portion (127) of at least some part of the inner electrode layers (12) is formed on the outer circumferential face of the ceramic laminated body (10). This outer circumferential groove portion (120) has at least one dent portion (121) protruding from the adjoining portion. The outer circumferential groove portion (120) has at least one of an insulating portion (181) made of insulating material and a conductive portion (183) made of conductive material.
    Type: Application
    Filed: February 4, 2004
    Publication date: September 23, 2004
    Applicant: Denso Corporation
    Inventors: Akio Iwase, Tetuji Itou, Toshio Ooshima, Shige Kadotani
  • Publication number: 20040159389
    Abstract: This invention provides a stacked ceramic body in which de-lamination (inter-layer peeling) does not easily occur, and a production method thereof. In the invention, a predetermined number of unit layers 151 and 152 each including a ceramic layer 111 112, an internal electrode layer 121, 122, a spacer 131, 132 having substantially the same thickness as the internal electrode layer 121, 122 and adhesive layers 14 stacked on the surface of the internal electrode layer and on the surface of the adhesive layer are stacked. A print portion for the internal electrode layer 121, 122 and a print portion for the spacer 131, 132 are formed on a green sheet for the ceramic layer 111, 112, and print portions for the adhesive layer 14 are formed on both of them to give an unsintered unit. The unsintered units are stacked to give an unsintered stacked body, are press-bonded and are then sintered.
    Type: Application
    Filed: February 20, 2004
    Publication date: August 19, 2004
    Applicant: Denso Corporation
    Inventors: Akio Iwase, Yukihisa Takeuchi, Tetuji Ito
  • Patent number: 6721163
    Abstract: This invention provides a stacked ceramic body in which de-lamination (inter-layer peeling) does not easily occur, and a production method thereof. In the invention, a predetermined number of unit layers 151 and 152 each including a ceramic layer 111 112, an internal electrode layer 121, 122, a spacer 131, 132 having substantially the same thickness as the internal electrode layer 121, 122 and adhesive layers 14 stacked on the surface of the internal electrode layer and on the surface of the adhesive layer are stacked. A print portion for the internal electrode layer 121, 122 and a print portion for the spacer 131, 132 are formed on a green sheet for the ceramic layer 111, 112, and print portions for the adhesive layer 14 are formed on both of them to give an unsintered unit. The unsintered units are stacked to give an unsintered stacked body, are press-bonded and are then sintered.
    Type: Grant
    Filed: December 5, 2002
    Date of Patent: April 13, 2004
    Assignee: Denso Corporation
    Inventors: Akio Iwase, Yukihisa Takeuchi, Tetuji Ito
  • Publication number: 20030168784
    Abstract: A method of fabricating a ceramic stack structure having dielectric layers which are not easily cracked or delaminated is disclosed. In fabricating a ceramic stack structure having a plurality of dielectric layers and a plurality of internal electrode layers stacked alternately with each other, a carrier film (20) is prepared and a plurality of internal electrode print portions (21) are formed. A large print portion (225) is formed in such a manner as to cover the internal electrode print portions (21). The large print portion (225) is dried and a coat layer (23) is formed in such a manner as to smooth out the unevenness of the surface of the large print portion (225). The large print portion (225) is removed from the carrier film (20) and punched to produce an unsintered unit. The unsintered unit is punched while at the same time stacking and attaching the particular unsintered unit on another unsintered unit under pressure.
    Type: Application
    Filed: March 3, 2003
    Publication date: September 11, 2003
    Inventors: Akio Iwase, Takeshi Matsui
  • Publication number: 20030107867
    Abstract: This invention provides a stacked ceramic body in which de-lamination (inter-layer peeling) does not easily occur, and a production method thereof. In the invention, a predetermined number of unit layers 151 and 152 each including a ceramic layer 111 112, an internal electrode layer 121, 122, a spacer 131, 132 having substantially the same thickness as the internal electrode layer 121, 122 and adhesive layers 14 stacked on the surface of the internal electrode layer and on the surface of the adhesive layer are stacked. A print portion for the internal electrode layer 121, 122 and a print portion for the spacer 131, 132 are formed on a green sheet for the ceramic layer 111, 112, and print portions for the adhesive layer 14 are formed on both of them to give an unsintered unit. The unsintered units are stacked to give an unsintered stacked body, are press-bonded and are then sintered.
    Type: Application
    Filed: December 5, 2002
    Publication date: June 12, 2003
    Inventors: Akio Iwase, Yukihisa Takeuchi, Tetuji Ito
  • Publication number: 20030085494
    Abstract: A method for producing a ceramic laminate includes a sheet-forming process for forming a green sheet 11 by placing a raw ceramic material on a carrier film 12, a punching process for punching a green sheet piece of a predetermined shape from the green sheet, a stacking process for sequentially stacking a plurality of the green sheet pieces to form a green laminate, and a calcination process for calcining the green laminate to obtain a ceramic laminate consisting of a plurality of ceramic layers, wherein, in the punching process, the green sheet piece only is punched while the green sheet 11 is held on the carrier film 12.
    Type: Application
    Filed: October 31, 2002
    Publication date: May 8, 2003
    Inventors: Akio Iwase, Yukihisa Takeuchi, Shoji Osaki, Tetsuji Ito, Toshio Ooshima, Shige Kadotani
  • Patent number: 6165054
    Abstract: A double side grinding apparatus and a double side polishing apparatus, with a narrow tolerance range, reduces pitching errors, and ensures a sufficient level of rigidity against the force of reaction to machining, while enhancing positioning accuracy. The double side grinding apparatus or a double side polishing apparatus includes a plurality of guideways for supporting and shifting main spindles, and these plural guideways on end define a geometric center matched with the center of gravity of the main spindles. The number of the guideways is preferably three in order not to obstruct the mounting and removal of a workpiece.
    Type: Grant
    Filed: February 18, 1999
    Date of Patent: December 26, 2000
    Assignees: Super Silicon Crystal Research Institute Corp., Sumitomo Heavy Industries, Ltd.
    Inventors: Kohzo Abe, Sho Isobe, Yoshiyuki Tomita, Kazutoshi Hara, Ryuzo Masaki, Akio Iwase, Hiroshi Nagata
  • Patent number: 5710999
    Abstract: A radio frequency apparatus has a tuner unit which is disposed in a tuner unit housing, and a demodulation unit which is disposed in a demodulation unit housing easily attached or removed to the tuner unit housing by a connecting device provided on side walls of the tuner unit housing and the demodulation unit housing.
    Type: Grant
    Filed: April 30, 1996
    Date of Patent: January 20, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akio Iwase, Shiro Yasue, Nobuyoshi Hizuka, Kohei Tanaka, Tomiyasu Chiba
  • Patent number: 5600680
    Abstract: A high frequency television signal receiving apparatus providing excellent linear detection of output characteristics by improving the phase characteristic of the picture synchronous detector. A variable capacitive element is equivalently connected in parallel to a reference solid-state oscillation element. The reference solid-state oscillation element controls the frequency of a local oscillation device including a PLL circuit for feeding a local oscillation signal to a mixer for converting a high frequency signal into an intermediate frequency signal. A first low pass filter is connected between a phase comparator for detecting a phase difference of the intermediate frequency signal and the output of a detection oscillator for generating a detection oscillation signal with a specific phase difference. A second low pass filter having a larger time constant than the first low pass filter is connected to the variable capacitive element.
    Type: Grant
    Filed: September 8, 1995
    Date of Patent: February 4, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akira Mishima, Hiroshi Nagai, Akio Iwase
  • Patent number: 5457817
    Abstract: A first PLL 15 circuit connected to a first local oscillator 4 and a second PLL circuit 18 connected to a second local oscillator 10 are disposed in a same casing 20, and it is therefore not necessary to issue the output signal of the second local oscillator 10 or the divided output signal of the first local oscillator 4 outside of the casing 20, so that generation of undesired harmonic interference due to adverse effects of distribution thereof may be eliminated, thereby obtaining a favorable reception state.
    Type: Grant
    Filed: January 3, 1994
    Date of Patent: October 10, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Nagai, Akira Mishima, Akio Iwase
  • Patent number: 4752712
    Abstract: A piezoelectric laminate stack having a plurality of piezoelectric plates manufactured of a piezoelectric element, and a plurality of metal plates. The metal plates have approximately the same shape as the piezoelectric plates, and are formed with at least two projections, respectively, on the periphery thereof. The length of the projections is greater than the thickness of the piezoelectric plates. The piezoelectric plates and the metal plates are alternately stacked. The projections of a first group of metal plates are located at angular positions different to angular positions of the projections of a second group of metal plates. The projections are bent in a direction along the axis of the laminate stack in such a manner that the first group of metal plates are electrically connected together and the second group of the metal plates are electrically connected together.
    Type: Grant
    Filed: November 25, 1986
    Date of Patent: June 21, 1988
    Assignee: Nippon Soken, Inc.
    Inventors: Masahiro Tomita, Eturo Yasuda, Akio Iwase