Patents by Inventor Akio Maruo

Akio Maruo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050280457
    Abstract: A high-speed current switch circuit of this invention has an n-type MOS transistor Q11 which switches and outputs a current, and a control circuit 11 which performs switching control of the MOS transistor Q11. In the control circuit 11, a source follower is formed by an N-type MOS transistor Q12 and a constant current source I2 which is a load on this transistor. A switch SW11 is connected to the MOS transistor Q12 to perform switching control of a current flowing through the MOS transistor Q12. The control circuit 11 includes a switch SW12 capable of grounding the gate of the MOS transistor 11. The source of the MOS transistor Q12 is connected to the gate of the MOS transistor Q11. Thus, even if a large current is caused to flow through the output transistor, the output transistor can be made to operate for switching at a high speed.
    Type: Application
    Filed: August 26, 2005
    Publication date: December 22, 2005
    Inventors: Yusuke Aiba, Masaki Ikeda, Takeshi Fujita, Hideaki Hirose, Akio Maruo
  • Patent number: 6958631
    Abstract: A high-speed current switch circuit of this invention has an n-type MOS transistor Q11 which switches and outputs a current, and a control circuit 11 which performs switching control of the MOS transistor Q11. In the control circuit 11, a source follower is formed by an N-type MOS transistor Q12 and a constant current source I2 which is a load on this transistor. A switch SW11 is connected to the MOS transistor Q12 to perform switching control of a current flowing through the MOS transistor Q12. The control circuit 11 includes a switch SW12 capable of grounding the gate of the MOS transistor 11. The source of the MOS transistor Q12 is connected to the gate of the MOS transistor Q11. Thus, even if a large current is caused to flow through the output transistor, the output transistor can be made to operate for switching at a high speed.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: October 25, 2005
    Assignee: Asahi Kasei Microsystems Co., Ltd.
    Inventors: Yusuke Aiba, Masaki Ikeda, Takeshi Fujita, Hideaki Hirose, Akio Maruo
  • Publication number: 20020190779
    Abstract: A high-speed current switch circuit of this invention has an n-type MOS transistor Q11 which switches and outputs a current, and a control circuit 11 which performs switching control of the MOS transistor Q11. In the control circuit 11, a source follower is formed by an N-type MOS transistor Q12 and a constant current source I2 which is a load on this transistor. A switch SW11 is connected to the MOS transistor Q12 to perform switching control of a current flowing through the MOS transistor Q12. The control circuit 11 includes a switch SW12 capable of grounding the gate of the MOS transistor 11. The source of the MOS transistor Q12 is connected to the gate of the MOS transistor Q11. Thus, even if a large current is caused to flow through the output transistor, the output transistor can be made to operate for switching at a high speed.
    Type: Application
    Filed: June 21, 2002
    Publication date: December 19, 2002
    Inventors: Yusuke Aiba, Masaki Ikeda, Takeshi Fujita, Hideaki Hirose, Akio Maruo