Patents by Inventor Akio Mimura
Akio Mimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7419860Abstract: A crystalline semiconductor having an even surface and a large crystal grain size is formed on an economical glass substrate using a laser crystallizing technology. A series of processes, including forming an insulation film on a glass substrate; forming a semiconductor film in the first layer; crystallizing the semiconductor film in the first layer by irradiating laser light stepwise from weak energy laser light to strong energy laser light; forming a semiconductor film in a second layer having a film thickness thinner than that of the semiconductor film in the first layer; performing laser crystallization of the semiconductor thin film in the second layer by irradiating laser light stepwise from weak energy laser light to strong energy laser light, are continuously performed without exposing the workpiece to the atmosphere.Type: GrantFiled: March 17, 2003Date of Patent: September 2, 2008Assignee: Hitachi, Ltd.Inventors: Youmei Shinagawa, Akio Mimura, Genshiro Kawachi, Takeshi Satoh
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Patent number: 7315335Abstract: A liquid crystal display device is provided with a pixel area on a substrate having plural gate lines, plural drain lines, plural thin film transistors and plural pixel electrodes corresponding to the plural thin film transistors, and a drive circuit area disposed at a periphery of the substrate and having a drive circuit for driving the plural thin film transistors. The thin film transistor has a polycrystalline silicon semiconductor layer formed on the substrate, a gate electrode formed on the polycrystalline silicon semiconductor layer with a gate insulating film interposed therebetween, an insulating film to cover the polycrystalline silicon semiconductor layer, the gate insulating film and the gate electrode, a drain electrode formed on the insulating film and electrically connected to the polycrystalline silicon semiconductor layer, and a source electrode formed on the insulating film, spaced from the drain electrode and electrically connected to the polycrystalline silicon semiconductor layer.Type: GrantFiled: August 19, 2003Date of Patent: January 1, 2008Assignee: Hitachi, Ltd.Inventors: Toshio Miyazawa, Akio Mimura
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Publication number: 20040038600Abstract: A liquid crystal display device is provided with a pixel area on a substrate having plural gate lines, plural drain lines, plural thin film transistors and plural pixel electrodes corresponding to the plural thin film transistors, and a drive circuit area disposed at a periphery of the substrate and having a drive circuit for driving the plural thin film transistors. The thin film transistor has a polycrystalline silicon semiconductor layer formed on the substrate, a gate electrode formed on the polycrystalline silicon semiconductor layer with a gate insulating film interposed therebetween, an insulating film to cover the polycrystalline silicon semiconductor layer, the gate insulating film and the gate electrode, a drain electrode formed on the insulating film and electrically connected to the polycrystalline silicon semiconductor layer, and a source electrode formed on the insulating film, spaced from the drain electrode and electrically connected to the polycrystalline silicon semiconductor layer.Type: ApplicationFiled: August 19, 2003Publication date: February 26, 2004Inventors: Toshio Miyazawa, Akio Mimura
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Patent number: 6636280Abstract: A liquid crystal display device is provided with a pixel area on a substrate having plural gate lines, plural drain lines, plural thin film transistors and plural pixel electrodes corresponding to the plural thin film transistors, and a drive circuit area disposed at a periphery of the substrate and having a drive circuit for driving the plural thin film transistors. The thin film transistor has a polycrystalline silicon semiconductor layer formed on the substrate, a gate electrode formed on the polycrystalline silicon semiconductor layer with a gate insulating film interposed therebetween, an insulating film to cover the polycrystalline silicon semiconductor layer, the gate insulating film and the gate electrode, a drain electrode formed on the insulating film and electrically connected to the polycrystalline silicon semiconductor layer, and a source electrode formed on the insulating film, spaced from the drain electrode and electrically connected to the polycrystalline silicon semiconductor layer.Type: GrantFiled: November 20, 2000Date of Patent: October 21, 2003Assignee: Hitachi, Ltd.Inventors: Toshio Miyazawa, Akio Mimura
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Publication number: 20030160239Abstract: A crystalline semiconductor having an even surface and a large crystal grain size is formed on an economical glass substrate using a laser crystallizing technology. A series of processes, including forming an insulation film on a glass substrate; forming a semiconductor film in the first layer; crystallizing the semiconductor film in the first layer by irradiating laser light stepwise from weak energy laser light to strong energy laser light; forming a semiconductor film in a second layer having a film thickness thinner than that of the semiconductor film in the first layer; performing laser crystallization of the semiconductor thin film in the second layer by irradiating laser light stepwise from weak energy laser light to strong energy laser light, are continuously performed without exposing the workpiece to the atmosphere.Type: ApplicationFiled: March 17, 2003Publication date: August 28, 2003Inventors: Youmei Shinagawa, Akio Mimura, Genshiro Kawachi, Takeshi Satoh
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Patent number: 6608326Abstract: A crystalline semiconductor having an even surface and a large crystal grain size is formed on an economical glass substrate using a laser crystallizing technology. A series of processes, including forming an insulation film on a glass substrate; forming a semiconductor film in the first layer; crystallizing the semiconductor film in the first layer by irradiating laser light stepwise from weak energy laser light to strong energy laser light; forming a semiconductor film in a second layer having a film thickness thinner than that of the semiconductor film in the first layer; performing laser crystallization of the semiconductor thin film in the second layer by irradiating laser light stepwise from weak energy laser light to strong energy laser light, are continuously performed without exposing the workpiece to the atmosphere.Type: GrantFiled: November 2, 2001Date of Patent: August 19, 2003Assignee: Hitachi, Ltd.Inventors: Youmei Shinagawa, Akio Mimura, Genshiro Kawachi, Takeshi Satoh
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Patent number: 6127210Abstract: A simple and convenient method of manufacturing a CMOS TFT semiconductor circuit device wherein a doping layer doped into a first conductivity type without a mask is compensated with a dopant of a second conductivity type having a high density so that the conductivity type of the doping layer of first conductivity type is inverted into the second conductivity type, and further, in order to carry out the inversion of the conductivity type by the compensation easily and reliably, the surface density of the dopant of the doping layer of first conductivity type is reduced prior to compensating with the dopant of second conductivity type.Type: GrantFiled: October 3, 1996Date of Patent: October 3, 2000Assignee: Hitachi, Ltd.Inventors: Akio Mimura, Hiroshi Suga, Masaichi Nagai, Youmei Shinagawa, Isao Ikuta
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Patent number: 5283566Abstract: A plane display includes a plurality of pixel capacitors, each of which includes first and second electrodes and a non-linear optical material disposed therebetween. A plurality of storage capacitors are respectively provided in association with the plurality of pixel capacitors, each of which includes the first electrode of the corresponding pixel capacitor, an insulating film, and a third electrode insulated from the first electrode through the insulating film and connected to an external power supply terminal. Additionally, a provided for each storage capacitor and connected between the third electrode of the associated storage capacitor and the external power supply terminal, for preventing a potential drop causable in the course of storing electric charge in the associated storage capacitor.Type: GrantFiled: April 15, 1992Date of Patent: February 1, 1994Assignee: Hitachi, Ltd.Inventors: Akio Mimura, Kikuo Ono, Takashi Suzuki, Masao Yoshimura, Nobutake Konishi, Jun-ichi Ohwada
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Patent number: 5266344Abstract: The present invention relates to a novel compound tetrahydrocurcumin and a substance containing the same, which are produced from curcumin or a substance containing it as a material. This substance has characteristic properties such as strong antioxidative activity and yellowish color generated from reducing the original color of curcumin. The curcumin is being produced from a Zingiberaceae plant classified into Curcuma longa as a tropical product and is used for a spice and a yellow pigment for curry powder and pickles. The present invention further relates to the production method.Type: GrantFiled: November 20, 1990Date of Patent: November 30, 1993Assignee: Kabushiki Kaisha Kobe Seiko ShoInventors: Akio Mimura, Yoshimasa Takahara, Toshihiko Osawa
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Patent number: 5182193Abstract: A method for measuring a biomass which comprises measuring an electric capacitance across at least one pair of electrodes attached to a bioreactor, and thereby continuously measuring a biomass of organisms (such as microorganism and plant or animal cells), which may or may not be immobilized in the bioreactor, according to the electric capacitance (dielectric permitivity) measured. The present invention permits one to measure on-line the quantities of microorgansisms or plant or animal cells without having to take samples from a bioreactor or culture tank.Type: GrantFiled: November 12, 1991Date of Patent: January 26, 1993Assignee: Kabushiki Kaisha Kobe Seiko ShoInventors: Ken Mishima, Akio Mimura, Yoshimasa Takahara, Kouji Asami, Tetsuya Hanai
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Patent number: 5149648Abstract: According to this invention, pulps can be produced in high yields while saving energy by previously fiberizing wood chips used as the original material and then treating with a microorganism having a high lignin-degrading activity and a low fiber-degrading activity upon the wood.In addition, new lignin-degrading enzymes produced by a microorganism used in this invention were identified.Type: GrantFiled: February 6, 1991Date of Patent: September 22, 1992Assignee: Kabushiki Kaisha Kobe Seiko ShoInventors: Tomoaki Nishida, Yoshinori Kashino, Akio Mimura, Yoshimasa Takahara, Kokki Sakai
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Patent number: 5132294Type: GrantFiled: July 2, 1991Date of Patent: July 21, 1992Assignee: Kabushiki Kaisha Kobe Seiko ShoInventors: Akio Mimura, Keiichi Takebayashi, Yoshimasa Takahara, Toshihiko Osawa
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Patent number: 5081027Abstract: According to this invention, pulps can be produced in high yields while saving energy by previously fiberizing wood chips used as the original material and then treating with a microorganism having a high lignin-degrading activity and a low fiber-degrading activity upon the wood.In addition, new lignin-degrading enzymes produced by a microorganism used in this invention were identified.Type: GrantFiled: March 15, 1990Date of Patent: January 14, 1992Assignee: Kabushiki Kaisha Kobe Seiko ShoInventors: Tomoaki Nishida, Yoshinori Kashino, Akio Mimura, Yoshimasa Takahara, Kokki Sakai
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Patent number: 5008218Abstract: A method for fabricating an active matrix substrate is disclosed which includes the following steps: forming an island region of a first semiconductor film on a prescribed insulating substrate; forming a first insulating film and a second semiconductor film on said first insulating film; forming a second insulating film on said second semiconductor film and thereafter forming a prescribed pattern of the second insulating film; depositing prescribed metal on the pattern and thereafter forming a compound of the second semiconductor film and the metal; removing unreacted portion of the metal; and etching said second semiconductor film and said first insulating film using said compound as a mask.Type: GrantFiled: September 18, 1989Date of Patent: April 16, 1991Assignee: Hitachi, Ltd.Inventors: Genshiro Kawachi, Akio Mimura, Nobutake Konishi, Kikuo Ono, Takashi Suzuki
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Patent number: 4954855Abstract: A thin film transistor formed on an insulating sulstrate is disclosed in which metal silicide layers are formed in a thin film made of a monocrystalline, polycrystalline, or amorphous semiconductor material, to be used as source and drain regions, and further a gate electrode includes a metal silicide layer.Type: GrantFiled: October 28, 1987Date of Patent: September 4, 1990Assignee: Hitachi, Ltd.Inventors: Akio Mimura, Yoshikazu Hosokawa, Takaya Suzuki, Takashi Aoyama, Nobutake Konishi, Yutaka Misawa, Kenji Miyata
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Patent number: 4942441Abstract: Complementary thin fillm transistors (C-TFT) formed on an insulating substrate, comprising a pair of highly resistive n-type silicon islands, a pair of heavily doped n-type regions formed in one of the islands to form source and drain regions of n-channel TFT, a pair of contacts formed on the surface of the other island and establishing a high potential barrier when the underlying region is of n-type and a low potential barrier when the underlying region is inverted to be of p-type. The process for manufacturing complementary TFTs can be simplified significantly.Type: GrantFiled: March 27, 1987Date of Patent: July 17, 1990Assignee: Hitachi, Ltd.Inventors: Nobutake Konishi, Yoshikazu Hosokawa, Akio Mimura, Takaya Suzuki, Jun-ichi Ohwada, Hideaki Kawakami, Kenji Miyata
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Patent number: 4760021Abstract: There is provided a proteinaceous biological response modifier having the following properties: (a) molecular weight: 35,000 to 65,000; (b) isoelectric point: 5.0 to 6.1; (c) physiological action on human leukemia cells: to induce human leukemia to differentiate into macrophage-like cells; (d) physiological action on myeloid leukemia cells from mice: to induce myeloid leukemia cells from mice to differentiate into macrophage-like cells; (e) affinity to Concanavalin A Sepharose: not adsorbed; (f) affinity to Blue Sepharose Resin: not adsorbed; (g) pH-stability and thermostability: substantially not inactivated at pH 2 to 10, at 2.degree. C. for 6 hours; not inactivated at 56.degree. C. for 60 minutes; but inactivated by 30% at 70.degree. C. for 60 minutes; (h) sensitivity to enzymes: not inactivated by deoxyribonuclease; not inactivated by glycosidase; and inactivated by protease; (i) flow cytometry analysis: to concentrate cell division cycle of human leukemia cells to G.sub.0 /G.sub.1 phase.Type: GrantFiled: November 7, 1984Date of Patent: July 26, 1988Assignee: Director-General of Agency of Industrial Science & TechnologyInventors: Akio Mimura, Kaoru Yoshinari, Katsumi Yuasa, Tsuneo Sato
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Patent number: 4746961Abstract: This invention relates to the structure of a field effect transistor, which is suitable for liquid crystal display of an active matrix scheme and there is disclosed a new structure for the field effect transistor, in which at least one of the source region and the drain region is of multi-layered structure, in which high impurity concentration portions and low impurity concentration portions are alternately superposed on each other.Type: GrantFiled: June 8, 1987Date of Patent: May 24, 1988Assignee: Hitachi, Ltd.Inventors: Nobutake Konishi, Kenji Miyata, Yoshikazu Hosokawa, Takaya Suzuki, Akio Mimura
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Patent number: 4450233Abstract: Microorganisms are immobilized by adding microorganism cells to an aqueous solution of a mixture of a polymerizable starch and a polymerizable monomer, and, thereafter, polymerizing the polymerizable starch and polymerizable monomer, to prepare a polymer gel with microorganism cells enclosed therein. The polymerizable starch is prepared by introducing an acrylamidomethyl group into starch. The polymer gel has high mechanical strength and can be used repeatedly over long periods of the time while maintaining at high levels the reactivity of the microorganism enclosed therein.Type: GrantFiled: December 15, 1981Date of Patent: May 22, 1984Assignee: Asahi Kasei Kogyo Kabushiki KaishaInventors: Akio Mimura, Katsumi Yuasa, Mitsuru Shibukawa
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Patent number: 4360594Abstract: A process for producing L-tryptophan or a derivative thereof is disclosed, wherein an indole compound is reacted with serine, or with pyruvic acid and ammonium ion, in the presence of a culture or treated culture of a microorganism of genus Aeromonas or genus Klebsiella having the ability to produce L-tryptophan or a derivative thereof from an indole compound and serine, or from an indole compound, pyruvic acid and/or its salt, and ammonium ion.Type: GrantFiled: June 17, 1981Date of Patent: November 23, 1982Assignee: Asahi Kasei Kogyo Kabushiki KaishaInventors: Akio Mimura, Yasuyuki Takahashi, Katsumi Yuasa, Mitsuru Shibukawa