Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Abstract: A semiconductor device includes: an isolation region formed in a semiconductor substrate; a first active region and a second active region surrounded by the isolation region; an n-type gate electrode and a p-type gate electrode formed on gate insulating films; an insulating film and a silicon region formed on the isolation region and isolating the n-type gate electrode and the p-type gate electrode from each other; and a metal silicide film formed on the upper surfaces of the n-type gate electrode, the silicon region, the p-type gate electrode, and part of the insulating film formed therebetween. The n-type gate electrode is electrically connected to the p-type gate electrode through the metal silicide film.

Abstract: A MIS transistor includes a gate electrode portion, insulating sidewalls formed on side surfaces of the gate electrode portion, source/drain regions and a stress film formed so as to cover the gate electrode portion and the source/drain regions. A height of an upper surface of the gate electrode portion is smaller than a height of an upper edge of each of the insulating sidewalls. A thickness of first part of the stress film located on the gate electrode portion is larger than a thickness of second part of the stress film located on the source/drain regions.

Abstract: A semiconductor device includes: an isolation region formed in a semiconductor substrate; an active region surrounded by the isolation region in the semiconductor substrate; a gate insulating film formed on the active region; and a gate electrode formed across the boundary between the active region and the isolation region adjacent to the active region. The gate electrode includes a first portion which is located above the active region with the gate insulating film interposed therebetween and is entirely made of a silicide in a thickness direction and a second portion which is located above the isolation region and is made of a silicon region and the silicide region covering the silicon region.

Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Abstract: A semiconductor device includes: an isolation region formed in a semiconductor substrate; a first active region and a second active region surrounded by the isolation region; an n-type gate electrode and a p-type gate electrode formed on gate insulating films; an insulating film and a silicon region formed on the isolation region and isolating the n-type gate electrode and the p-type gate electrode from each other; and a metal silicide film formed on the upper surfaces of the n-type gate electrode, the silicon region, the p-type gate electrode, and part of the insulating film formed therebetween. The n-type gate electrode is electrically connected to the p-type gate electrode through the metal silicide film.

Abstract: A semiconductor device, including a first MIS-type transistor formed in a first region of a semiconductor region, the first region being of a first conductivity type, the first MIS-type transistor including: a first gate insulating film formed on the first region; a first gate electrode formed on the first gate insulating film; a first extension diffusion layer of a second conductivity type formed in a region of the first region under and beside the first gate electrode; and a first fluorine diffusion layer formed in a first channel region of the first conductivity type sandwiched between portions of the first extension diffusion layer, wherein portions of the first fluorine diffusion layer extend from the first extension diffusion layer and overlap together in a region directly under the first gate electrode.

Abstract: A high dielectric constant gate insulating film is formed on an active region of a substrate, and a gate electrode is formed on the high dielectric constant gate insulating film. A high dielectric constant insulating sidewall is formed on a side face of the gate electrode.

Abstract: After gate insulating film formation films are formed in an element formation region of a semiconductor substrate, a gate electrode formation film is formed on the gate insulating film formation films. A fluorine-containing insulting film is formed on the gate electrode formation film. Then, thermal treatment is performed to diffuse and introduce the fluorine contained in the fluorine-containing insulating film to interfaces between the semiconductor substrate and the gate insulting film formation films.

Abstract: After a Ni film is deposited on a substrate on which a gate silicon layer is formed, a mask is formed above the gate silicon layer. Then, the Ni film is etched so as to leave a part of the Ni film which is located on the gate silicon layer. This restricts sideways supply of Ni present on the sides of the gate silicon layer. Thereafter, thermal treatment is performed to silicidate the gate silicon layer entirely.

Abstract: A semiconductor device, including a first MIS-type transistor formed in a first region of a semiconductor region, the first region being of a first conductivity type, the first MIS-type transistor including: a first gate insulating film formed on the first region; a first gate electrode formed on the first gate insulating film; a first extension diffusion layer of a second conductivity type formed in a region of the first region under and beside the first gate electrode; and a first fluorine diffusion layer formed in a first channel region of the first conductivity type sandwiched between portions of the first extension diffusion layer, wherein portions of the first fluorine diffusion layer extend from the first extension diffusion layer and overlap together in a region directly under the first gate electrode.

Abstract: A MIS transistor includes a gate electrode portion, insulating sidewalls formed on side surfaces of the gate electrode portion, source/drain regions and a stress film formed so as to cover the gate electrode portion and the source/drain regions. A height of an upper surface of the gate electrode portion is smaller than a height of an upper edge of each of the insulating sidewalls. A thickness of first part of the stress film located on the gate electrode portion is larger than a thickness of second part of the stress film located on the source/drain regions.

Abstract: A semiconductor device includes: an isolation region formed in a semiconductor substrate; an active region surrounded by the isolation region in the semiconductor substrate; a gate insulating film formed on the active region; and a gate electrode formed across the boundary between the active region and the isolation region adjacent to the active region. The gate electrode includes a first portion which is located above the active region with the gate insulating film interposed therebetween and is entirely made of a silicide in a thickness direction and a second portion which is located above the isolation region and is made of a silicon region and the silicide region covering the silicon region.

Abstract: A semiconductor device includes: a first element region and a second element region formed on a substrate to be adjacent to each other with an isolation region interposed therebetween; a first gate insulating film formed on the first element region; a second gate insulating film formed on the second element region; and a gate electrode continuously formed on the first gate insulating film, the isolation region and the second gate insulating film. The gate electrode includes a first silicided region formed to come into contact with the first gate insulating film, a second silicided region which is formed to come into contact with the second gate insulating film and is of a different composition from the first silicided region, and a conductive anti-diffusion region composed of a non-silicided region formed in a part of the gate electrode located on the isolation region and between the first element region and the second element region.

Abstract: A Ni film is deposited over the entire surface of a substrate including a silicon gate. Then, the silicon gate is partially removed by, for example, CMP, thereby leaving a Ni layer having a flat upper surface and a uniform thickness directly on the silicon gate. Subsequently, silicidation is performed, thereby forming a gate electrode having a uniform silicide phase.