Abstract: A variable-length codeword encoder is disclosed which produces 8-bit output segments for storage in a buffer (23) for subsequent transmission over a transmission channel (24). The encoder includes two memory tables (15, 16), which produce in response to each input symbol to be encoded, a variable-length codeword and an a codeword length. An accumulator (31, 33) accumulates, modulo-8, the successive codeword lengths, producing a carry signal during any clock cycle in which eight or more bits codeword bits are accumulated. At each clock cycle, the variable-length codeword is input to the parallel inputs of a cross bar shift control circuit (30). This shift control circuit produces a 16-bit output in which the input word is embedded.