Patents by Inventor Akio Tsuneda

Akio Tsuneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6014445
    Abstract: An enciphering apparatus embodying this invention comprises chaos generation means for generating a real-valued sequence along a chaotic orbit in accordance with a predetermined number of first common keys and a predetermined nonlinear map, bit generation means for performing predetermined binarization on each real value in the generated real-valued sequence based on a predetermined number of second common keys to generate a binary sequence, and logic operation means for executing a predetermined logic operation on a binary sequence of an input plaintext and the generated keystream sequence bit by bit to generate a binary sequence of a ciphertext. For example, the first common keys are an initial seed of a nonlinear map and a value of a parameter k, and the bit generation means acquires plural pieces of binary data for each real value in the real-valued sequence using values indicated by a plurality of second keys as thresholds and obtains exclusive OR of those binary data.
    Type: Grant
    Filed: October 22, 1996
    Date of Patent: January 11, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tohru Kohda, Akio Tsuneda