Abstract: The solution of a constrained optimization problem is easily solved by linearly approximating a point of interest to a first hypersurface given as a constraint and finding the extreme value of the objective function by moving a point r along a curved line having second-order osculation with the geodetic line of a hypersurface S(r)=c and passing through the point r.

Abstract: A semiconductor integrated circuit fabrication method according to this invention includes: a step of forming a pair of first device forming regions and a pair of second device forming regions in a surface layer portion of a semiconductor substrate by surrounding each of the regions by device isolation; a step of forming a first oxide film covering the surface of the semiconductor substrate after the preceding step; a step of removing an intended portion of the first oxide film to expose the pair of second device forming regions; a step of forming a pair of heterojunction structures, by selective epitaxial growth, on the pair of second device forming regions thus exposed; a step of forming a second oxide film covering the surface of the substrate after the preceding step; and a step of forming a pair of gate electrodes above each of the pair of first device forming regions and the pair of second device forming regions, whereby a normal complementary MOS transistor and a heterojunction complementary MOS transi

Abstract: A method is provided in which the recognition specificity of a virus for a receptor sugar chain can be easily determined with a simple instrument or apparatus. This method for determining the recognition specificity of a virus for a receptor sugar chain or for determining the change in a host infected in accordance with the mutation of virus includes the steps of bringing a sample of the virus into contact with a support having a polymer with sialo-oligosaccharide immobilized on the surface thereof; and assaying the degree of binding therein to determine the recognition specificity of the virus for the receptor sugar chain and to determine the change in a host range. The method is suitable for the surveillance of a virus.

Abstract: A method for numerical calculation related to fluids which is efficient and less liable to cause numerical diffusion and does not rely upon the functional form of an equation of state and hence can be used as a generalized numerical calculation method. A flux is divided into an advection part, a pressure-dependent part, and a dissipation part, according to physical properties thereof, to calculate a one-dimensional basic equation. A time evolution is executed on the advection part and the pressure-dependent part using an upwind difference type leap-frog difference method and a central difference type leap-frog difference method, respectively.

Abstract: A semiconductor device according to this invention includes: a first insulating layer (11); a first body section (13) including an island-shaped semiconductor formed on the first insulating layer; a second body section (14) including an island-shaped semiconductor formed on the first insulating layer; a ridge-shaped connecting section (15) formed on the first insulating layer to interconnect the first body section and the second body section; a channel region (15a) formed by at least a part of the connecting section in lengthwise direction of the connecting section; a gate electrode (18) formed to cover a periphery of the channel region, with a second insulating layer intervening therebetween; a source region formed to extend over the first body section and a portion of the connecting section between the first body section and the channel region; and a drain region formed to extend over the second body section and a portion of the connecting section between the second body section and the channel region, wher

Abstract: There is provided an interpolation method for the Volume-of-Fluid (VOF) applied to a two-phase incompressible fluid, in particular, which makes it possible to cause time evolution of a shape-describing function based on the Volume-of-Fluid (VOF) method while preserving a sharpness of a shape described by the function. The method defines a function F on a one-dimensional structured grid formed on a one-dimensional real region, the function being defined through definition of a value thereof at a center of each cell within the one-dimensional structured grid, as an interpolation function H. With respect to a cell of interest on the one-dimensional structured grid, a slope is set to zero if a forward difference and a backward difference of the function f have different signs, and to a value twice as large as a smaller one of absolute values of the forward difference and the backward difference if the forward difference and the backward difference have the same sign.

Abstract: In an optimum design method comprising a first solution determining step of solving an optimization problem of a first evaluation function for a state variable vector with a design variable vector being as a parameter, and a second solution determining step of solving an optimization problem of a second evaluation function for the design variable vector and the state variable vector thus obtained, the second solution determining step includes the steps of computing a gradient vector of the second evaluation function for the design variable vector, computing a first coefficient based on a value of a norm of the gradient vector, computing a search vector based on the first coefficient, computing a second coefficient, and updating the design variable vector based on the second coefficient.

Abstract: In an optimum design method comprising a first solution determining step of solving an optimization problem of a first evaluation function for a state variable vector with a design variable vector being as a parameter, and a second solution determining step of solving an optimization problem of a second evaluation function for the design variable vector and the state variable vector thus obtained, the second solution determining step includes the steps of computing a gradient vector of the second evaluation function for the design variable vector, computing a first coefficient based on a value of a norm of the gradient vector, computing a search vector based on the first coefficient, computing a second coefficient, and updating the design variable vector based on the second coefficient.

Abstract: In a field effect transistor, an Si layer 11, an SiC (Si1?yCy) channel layer 12, a CN gate insulating film 13 made of a carbon nitride layer (CN) and a gate electrode 14 are deposited in this order on an Si substrate 10. The thickness of the SiC channel layer 12 is set to a value that is less than or equal to the critical thickness so that a dislocation due to a strain does not occur according to the carbon content. A source region 15 and a drain region 16 are formed on opposite sides of the SiC channel layer 12, and a source electrode 17 and a drain electrode 18 are provided on the source region 15 and the drain region 16, respectively.

Abstract: The present invention provides a semiconductor device comprising: a semiconductor layer (3); a gate electrode (11) formed on the semiconductor layer (3) via a gate insulation film (10); and a first insulation film (13) formed at one or more of sidewalls of the semiconductor layer (3), the gate insulation film (10) and the gate electrode (11); wherein the first insulation film (13) overlies a part of the gate insulation film (10) surface. According to the semiconductor device, leakage current at the isolation edge can be suppressed and thus reliability can be improved.

Abstract: During an incompressible fluid movement, three consecutive times during the movement of the fluid are called first, second, and third times in time order, calculation is performed with two different types of lattices for the first and third times and for the second time. Momentum and mass density at the first time are temporally developed to the third time in accordance with a conservation law by using an upwind velocity field. A pressure at the second time is determined so that a velocity field derived from momenta at the third time satisfies an incompressibility condition, and the field at the third time is corrected by adding a change in momentum caused by a pressure term using the determined pressure. This prevents pressure vibration and avoids the complexity of advective term calculation.

Abstract: In a method for determining a minimum value of an optimization function under constraints given by equations, a set of points which satisfy the constraints is regarded as a Riemannian manifold within a finite-dimensional real-vector space, the Riemannian manifold is approached from an initial position within the real-vector space. An exponential map regarding a geodesic line equation with respect to a tangent vector on the Riemannian manifold ends at a finite order, an approximate geodesic line is generated as a one-dimensional orbit. An approximate parallel-translation is performed on the tangent vector on the Riemannian manifold and on the orbit generated in the orbit generating step by finite-order approximation of the exponential map regarding the parallel translation of the tangent vector.

Abstract: It provides a finite element method library which improves the reliability of a program using the finite element method as a library, and avoids calculation errors and an increase in convergence time due to programming errors. To this end, a library that describes a program process based on the finite element method is characterized in that a vector of a vector space spanned by basis functions of the finite element method, and a dual vector of a dual vector space defined by a metric derived from an inner product which is determined by the square integrations of the basis functions, are defined as different abstract data types.

Abstract: A semiconductor device according to this invention includes: a first insulating layer (11); a first body section (13) including an island-shaped semiconductor formed on the first insulating layer; a second body section (14) including an island-shaped semiconductor formed on the first insulating layer; a ridge-shaped connecting section (15) formed on the first insulating layer to interconnect the first body section and the second body section; a channel region (15a) formed by at least a part of the connecting section in lengthwise direction of the connecting section; a gate electrode (18) formed to cover a periphery of the channel region, with a second insulating layer intervening therebetween; a source region formed to extend over the first body section and a portion of the connecting section between the first body section and the channel region; and a drain region formed to extend over the second body section and a portion of the connecting section between the second body section and the channel region, wher

Abstract: On an Si substrate 1, a buffer layer 2, a SiGe layer 3, and an Si cap layer 4 are formed. A mask is formed on the substrate, and then the substrate is patterned. In this manner, a trench 7a is formed so as to reach the Si substrate 1 and have the side faces of the SiGe layer 3 exposed. Then, the surface of the trench 7a is subjected to heat treatment for one hour at 750° C. so that Ge contained in a surface portion of the SiGe layer 3 is evaporated. Thus, a Ge evaporated portion 8 having a lower Ge content than that of other part of the SiGe layer 3 is formed in part of the SiGe layer 3 exposed at part of the trench 7a. Thereafter, the walls of the trench 7a are oxidized.

Abstract: A MISFET according to this invention includes: a substrate having a semiconductor layer; an active region formed in the semiconductor layer; a gate insulator formed on the active region; a gate formed on the gate insulator; and a source region and a drain region, wherein: the active region is formed, in plan view, to have a body portion and a projecting portion projecting from a periphery of the body portion; the gate is formed, in plan view, to intersect the body portion of the active region, cover a pair of connecting portions connecting a periphery of the projecting portion to the periphery of the body portion and allow a part of the projecting portion to project from a periphery of the gate; and the source region and the drain region are formed in regions of the body portion of the active region which are situated on opposite sides of the gate in plan view, respectively.

Abstract: A method of forming semiconductor crystal of the present invention comprises the steps of heating a Si substrate to clean a surface of the Si substrate, epitaxially growing Si crystal on the Si substrate inside a crystal growth chamber at a growth temperature lower than a substrate temperature of the Si substrate in the cleaning step and higher than a growth temperature at which SiGe crystal is epitaxially grown later, and epitaxially growing the SiGe crystal on the Si crystal.

Abstract: Immediately after a Si/SiGe film containing a contaminant is formed over all surfaces of a substrate by epitaxial growth, a portion of the Si/SiGe film formed to the back surface side of the substrate is removed by wet etching. In addition, the Si/SiGe film is subjected to processing with heating in a container, after which a dummy run is carried out in the container. These processings prevent secondary wafer contamination through a stage, a robot arm or a vacuum wand for handling a wafer and the contamination of the container also used in the fabrication process of a semiconductor device free from any group IV element but Si.

Abstract: A semiconductor integrated circuit fabrication method according to this invention includes: a step of forming a pair of first device forming regions and a pair of second device forming regions in a surface layer portion of a semiconductor substrate by surrounding each of the regions by device isolation; a step of forming a first oxide film covering the surface of the semiconductor substrate after the preceding step; a step of removing an intended portion of the first oxide film to expose the pair of second device forming regions; a step of forming a pair of heterojunction structures, by selective epitaxial growth, on the pair of second device forming regions thus exposed; a step of forming a second oxide film covering the surface of the substrate after the preceding step; and a step of forming a pair of gate electrodes above each of the pair of first device forming regions and the pair of second device forming regions, whereby a normal complementary MOS transistor and a heterojunction complementary MOS transi

Abstract: A semiconductor integrated circuit including a plurality of bipolar transistors that are produced by forming, in a plurality of transistor-producing regions, a first conductive type emitter layer on the front surface side of a second conductive type base layer that is formed on the surface side of a first conductive collector layer and contains germanium, the first conductive type emitter layer being formed from a semiconductor material having a band gap larger than the base layer. The concentrations of impurities contained in the emitter layers vary among the plurality of transistor-producing regions, and the germanium concentrations differ in the base-emitter junction interfaces of at least two of the transistor-producing regions, such that the ON-state voltages required for turning the plurality of bipolar transistors into an ON state differ from each other.