Abstract: A storage device includes: a plurality of first storage devices; a second storage device; and a control device to use the plurality of first storage devices as a primary storage and the second storage device as a secondary storage, control access processing to a plurality of logical volumes each of which indicates a virtual recording medium, register a logical volume for which a mount request is made within a predetermined period of time among the plurality of logical volumes in an management information as the logical volume which belongs to the same group, and allocate a storage area of the primary storage corresponding to each of a plurality of registered logical volumes which belong to a group registered in the management information to any one of the plurality of first storage devices such that an allocation destination of the storage area is distributed among the plurality of first storage devices.

Abstract: An information processing apparatus, for managing a target apparatus including a plurality of modules for which a plurality of update processes of software are executed, includes a specification unit to specify one or more first process blocks from among the update processes for the modules of the target apparatus based on execution order information indicating an execution order of the update processes, each first process block including a plurality of update processes to be executed in parallel, a first estimating unit to estimate an update time for each specified first process block, using update time information indicating an update time taken for each of the update processes, and a second estimating unit to estimate a total update time for the target apparatus, using the update time information and the estimated update time for each specified first process block.

Abstract: A storage device includes: a plurality of first storage devices; a second storage device; and a control device to use the plurality of first storage devices as a primary storage and the second storage device as a secondary storage, control access processing to a plurality of logical volumes each of which indicates a virtual recording medium, register a logical volume for which a mount request is made within a predetermined period of time among the plurality of logical volumes in an management information as the logical volume which belongs to the same group, and allocate a storage area of the primary storage corresponding to each of a plurality of registered logical volumes which belong to a group registered in the management information to any one of the plurality of first storage devices such that an allocation destination of the storage area is distributed among the plurality of first storage devices.

Abstract: A rotation control method controls rotation of a CAV system recording medium which has a plurality of zones divided in a radial direction thereof. The rotation control method detects a state within a memory which temporarily stores write data to be written on the recording medium and/or read data read from the recording medium, and switches and controls a rotational speed of the recording medium based on the detected state of the memory, depending on an area which is accessed of a plurality of areas of the recording medium dividing the recording medium in the radial direction thereof.

Abstract: When a write access is received from an upper apparatus, a cache control unit develops write data into a data buffer area in a memory, notifies the upper apparatus of a normal end, and thereafter, writes the write data developed into the data buffer area onto a storing medium. An access kind discriminating unit analyzes whether the write access from the host is a sequential access or a random access. A buffer construction control unit selects a data buffer construction of the optimum number of sections in accordance with an access kind and executes the caching operation.

Abstract: A rotation control method controls rotation of a CAV system recording medium which has a plurality of zones divided in a radial direction thereof. The rotation control method detects a state within a memory which temporarily stores write data to be written on the recording medium and/or read data read from the recording medium, and switches and controls a rotational speed of the recording medium based on the detected state of the memory, depending on an area which is accessed of a plurality of areas of the recording medium dividing the recording medium in the radial direction thereof.

Abstract: In a storage device in which data is read ahead and stored in a cache memory during reading of data from a medium, a data buffer is managed so that the probability that data to be read is found in the cache memory will improve. The memory area in the cache memory is divided so that a DIR-associated data buffer area used to store a leading address and file name of each file, a FAT-associated data buffer area used to store an address of each file in the next sector, and a data division-associated data buffer area used to store data can all be defined. Addresses referring to the FAT-associated data buffer area and DIR-associated data buffer area are fixed. As a result, as more and more data is read, more and more valid data corresponding to the data residing in the FAT and DIR in a storage medium is found in the cache memory. Consequently, when data reading is requested, data can be transferred without the necessity of reading the storage medium. This results in a shortened reading time.

Abstract: Disclosed is A ROM testing circuit for testing ROMs embedded in respective chips arranged on a wafer, which ROM testing circuit comprises units which are embedded in the respective chips, wherein each of the units comprises: input means for receiving a signal outputted from the ROM embedded in one adjacent chip or from each of the ROMs embedded in two or more respective adjacent chips; output means for outputting a signal outputted from the ROM formed in the chip to which the unit belongs to the one adjacent chip or to the two or more adjacent chips; and means for comparing the signal outputted from the ROM in the chip to which the unit belongs with the signal or signals inputted via the input means. With this arrangement, all adjacent chips can be tested with respect to their ROMs simultaneously.

Abstract: A plurality of reference memory cell units are arranged to be connected to rows of matrix-patterned information memory cell units. Each of the reference memory cell units comprises a selection cell of an NMOS transistor, and three reference memory cells of depletion type NMOS transistors, and each of the information memory cell units comprises a selection cell of an NMOS transistor, and three information memory cells of NMOS transistors, one of which is of a depletion type. The selection cells are connected between the reference and information memory cells by a common selection line. The reference and information memory cells are connected by common word lines. Current mirror type sense amplifiers are connected to the columns of information memory cell units by digit lines. This arrangement avoids the occurrence of the unevenness of characteristics resulting from the fabrication process.