Patents by Inventor Akira Chinda

Akira Chinda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8230591
    Abstract: An electronic device substrate is provided with a thin-plate core substrate; a metal electrode provided on the core substrate and electrically connected to an electrode of an electronic component to be packaged thereon; and an electrical insulation layer on which is mounted the electronic component, and which is provided to surround the metal electrode.
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: July 31, 2012
    Assignees: Hitachi Cable, Ltd., Renesas Electronics Corporation
    Inventors: Akira Chinda, Nobuaki Miyamoto, Koki Hirasawa, Kenji Uchida, Mamoru Mita
  • Patent number: 8230588
    Abstract: A method of making an electronic device is disclosed. The method includes the steps of providing an electronic device substrate, mounting an electronic part on the electronic device substrate, removing the tape member and the metal film from the electronic device substrate, and forming a conductive structure at a position corresponding to the metal plating layer. The electronic device substrate includes a base material formed of a thin board and the base material includes a tape member, a metal film, a release layer, a metal layer, an electrical insulation layer and a metal plating layer filled in the plurality of openings.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: July 31, 2012
    Assignees: Hitachi Cable, Ltd., Renesas Electronics Corporation
    Inventors: Nobuaki Miyamoto, Akira Chinda, Koki Hirasawa, Kenji Uchida
  • Patent number: 8101864
    Abstract: An electronic device substrate is provided with a thin-plate core substrate; a metal electrode provided on the core substrate and electrically connected to an electrode of an electronic component to be packaged thereon; and an electrical insulation layer on which is mounted the electronic component, and which is provided to surround the metal electrode.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: January 24, 2012
    Assignees: Hitachi Cable, Ltd., Renesas Electronics Corporation
    Inventors: Akira Chinda, Nobuaki Miyamoto, Koki Hirasawa, Kenji Uchida, Mamoru Mita
  • Patent number: 7939935
    Abstract: A core substrate-less electronic device is fabricated by using an electronic device substrate 10. The electronic device substrate 10 a metal core substrate 11, and an external connection wiring layer 100 provided on the metal core substrate 11, and an electronic parts-mounting layer 110 provided on the external connection wiring layer 100. The external connection wiring layer 100 has a first plating film 103 as an external connection terminal, and a PSR film 101 as an electrical insulating material. The electronic parts-mounting layer 110 has a conductive film 113 as an internal conductor pattern and a PSR film 111 as an electrical insulating material. A surface of the conductive film 113 is in a same plane as a surface of the PSR film 111.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: May 10, 2011
    Assignees: Hitachi Cable Ltd., Renesas Electronics Corporation
    Inventors: Akira Chinda, Nobuaki Miyamoto, Koki Hirasawa, Kenji Uchida
  • Patent number: 7880091
    Abstract: An electronic device substrate having: a base material formed of a thin board; an electrical insulation layer formed on the base material and having plural openings in a thickness direction thereof; and a metal plating layer filled in the plural openings. The base material has a metal layer, a release layer formed contacting the metal layer, and a metal film formed contacting the release layer.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: February 1, 2011
    Assignees: Hitachi Cable, Ltd., Renesas Electronics Corporation
    Inventors: Nobuaki Miyamoto, Akira Chinda, Koki Hirasawa, Kenji Uchida
  • Patent number: 7780836
    Abstract: On both surfaces of an electric insulating material 1, a surface conductive layer 2A and a back surface conductive layer 2B are formed by transcription. Further, a via hole 5 penetrating through the surface conductive layer 2A and the electric insulating material 1 is provided. After forming a photosensitive plating resist pattern 14, the via hole 5 is filled with a copper plating filler 15, and the surface wiring layer 9A and the back surface wiring layer 9B are formed. Thereafter, the photosensitive plating resist pattern 14 as well as the surface conductive layer 2A and the back surface conductive layer 2B provided under the photosensitive plating resist pattern 14 are removed to fabricate a double-sided wiring board 11.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: August 24, 2010
    Assignees: Hitachi Cable, Ltd.
    Inventors: Akira Chinda, Nobuaki Miyamoto, Mamoru Mita
  • Publication number: 20100181100
    Abstract: A copper wiring board having fine wiring, and a method for manufacturing the same are provided. The copper wiring board of the present invention is a wiring board comprising an insulating substrate, a plurality of wire trenches formed in the insulating substrate, and wires filled in the wire trenches, wherein when any two of the wires are selected, and cross sections are taken perpendicular to a direction of current flow in the wires, a wire width in one wire cross section is narrower than a wire width in the other wire cross section, and a wire thickness in the one wire cross section is thicker than a wire thickness in the other wire cross section.
    Type: Application
    Filed: January 21, 2010
    Publication date: July 22, 2010
    Inventors: Hiroshi NAKANO, Hitoshi SUZUKI, Toshio HABA, Haruo AKAHOSHI, Hiroshi YOSHIDA, Akira CHINDA
  • Patent number: 7705245
    Abstract: An electronic device substrate is formed of a thin-plate reinforcing substrate; an external connection wiring layer stacked on the reinforcing substrate, and comprising an electrical insulation provided on the reinforcing substrate, an opening formed in the electrical insulation, a first conductor pattern and a via-hole conductor provided in the opening and formed integrally with each other; and a second conductor pattern formed on the opposite side of the electrical insulation to the reinforcing substrate, and at least partially electrically connected to the via-hole conductor.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: April 27, 2010
    Assignees: Hitachi Cable, Ltd., NEC Electronics Corporation
    Inventors: Nobuaki Miyamoto, Akira Chinda, Koki Hirasawa, Kenji Uchida
  • Patent number: 7681310
    Abstract: A method is provided for fabricating a double-sided wiring board for mounting an electronic component thereon having metal wiring patterns formed both on upper and lower sides of an electrically-insulating board. The metal wiring patterns are electrically connected each other through a through-hole and/or a blind via-hole. The method has the steps of: laminating a metal layer with a support substrate on at least one side of the electrically-insulating board; removing the support substrate from the metal layer so that the metal layer is left on the electrically-insulating board; and forming the through-hole and/or the blind via-hole in the electrically-insulating board.
    Type: Grant
    Filed: October 21, 2005
    Date of Patent: March 23, 2010
    Assignee: Hitachi Cable, Ltd.
    Inventors: Akira Chinda, Nobuaki Miyamoto
  • Publication number: 20090323299
    Abstract: An electronic device substrate having: a base material formed of a thin board; an electrical insulation layer formed on the base material and having plural openings in a thickness direction thereof; and a metal plating layer filled in the plural openings. The base material has a metal layer, a release layer formed contacting the metal layer, and a metal film formed contacting the release layer.
    Type: Application
    Filed: September 3, 2009
    Publication date: December 31, 2009
    Applicants: HITACHI CABLE, LTD., NEC ELECTRONICS COPORATION
    Inventors: Nobuaki Miyamoto, Akira Chinda, Koki Hirasawa, Kenji Uchida
  • Publication number: 20090211796
    Abstract: An electronic device substrate is provided with a thin-plate core substrate; a metal electrode provided on the core substrate and electrically connected to an electrode of an electronic component to be packaged thereon; and an electrical insulation layer on which is mounted the electronic component, and which is provided to surround the metal electrode.
    Type: Application
    Filed: April 29, 2009
    Publication date: August 27, 2009
    Inventors: Akira Chinda, Nobuaki Miyamoto, Koki Hirasawa, Kenji Uchida, Mamoru Mita
  • Publication number: 20090057156
    Abstract: It is an object of the present invention to alleviate a work for removing an unnecessary metal layer when wiring and vias are formed on a substrate by electroplating. An additive is added to a plating solution to be used for electroplating. The additive has a plating reaction suppressing capability, but has a characteristic that the plating reaction suppressing capability is reduced as the plating reaction progresses. The additive has a capability for increasing a metal deposition overpotential and has a characteristic that the metal deposition overpotential is reduced as the reaction progresses. As a result, the metal can be deposited selectively in a trench and a via formed on the substrate. When a wiring and a via are formed on the substrate, the trench and the via having a predetermined surface roughness are formed on the substrate.
    Type: Application
    Filed: August 13, 2008
    Publication date: March 5, 2009
    Inventors: Toshio Haba, Haruo Akahoshi, Hitoshi Suzuki, Akira Chinda
  • Publication number: 20080251387
    Abstract: It is an object of the present invention to provide a wiring board having high-density wiring with a controlled shape without masking by a resist film and a production method thereof. In the present invention, the production method of a wiring board having copper wiring on an insulating substrate includes the steps of forming a metal seed layer on the insulating substrate, the metal seed layer having a roughened shape in a portion on which the copper wiring or a bump is to be formed, and forming an electroplated film of copper or an alloy of copper through electroplating on the portion of the metal seed layer having the roughened shape. A substance for suppressing the plating reaction is added to a plating bath to provide an angle of 90 degrees or smaller between a surface of the insulating substrate and a side of the electroplated film.
    Type: Application
    Filed: June 12, 2008
    Publication date: October 16, 2008
    Inventors: Toshio Haba, Hiroshi Yoshida, Haruo Akahoshi, Hitoshi Suzuki, Akira Chinda
  • Publication number: 20080201943
    Abstract: An electronic device substrate is provided with a thin-plate core substrate; a metal electrode provided on the core substrate and electrically connected to an electrode of an electronic component to be packaged thereon; and an electrical insulation layer on which is mounted the electronic component, and which is provided to surround the metal electrode.
    Type: Application
    Filed: April 17, 2008
    Publication date: August 28, 2008
    Inventors: Akira Chinda, Nobuaki Miyamoto, Koki Hirasawa, Kenji Uchida, Mamoru Mita
  • Publication number: 20070287289
    Abstract: [Problem to be Solved] An object of the present invention is to provide a method of forming a conductive pattern having an excellent uniformity of film thickness within the surface of a substrate independently of the density of the pattern. [Solution] The production method of a conductive pattern in accordance with the present invention comprises the step of electroplating for forming a conductive pattern by electroplating on a metal seed layer formed on an insulated substrate using a plating bath containing an accelerator for reducing the deposition overpotential of a plated metal.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 13, 2007
    Inventors: Toshio Haba, Hitoshi Suzuki, Naohito Satou, Haruo Akahoshi, Hiroshi Yoshida, Akira Chinda
  • Publication number: 20070269590
    Abstract: An electronic device substrate having: a base material formed of a thin board; an electrical insulation layer formed on the base material and having plural openings in a thickness direction thereof; and a metal plating layer filled in the plural openings. The base material has a metal layer, a release layer formed contacting the metal layer, and a metal film formed contacting the release layer.
    Type: Application
    Filed: December 27, 2006
    Publication date: November 22, 2007
    Applicants: HITACHI CABLE, LTD., NEC ELECTRONICS CORPORATION
    Inventors: Nobuaki Miyamoto, Akira Chinda, Koki Hirasawa, Kenji Uchida
  • Publication number: 20070268675
    Abstract: A core substrate-less electronic device is fabricated by using an electronic device substrate 10. The electronic device substrate 10 a metal core substrate 11, and an external connection wiring layer 100 provided on the metal core substrate 11, and an electronic parts-mounting layer 110 provided on the external connection wiring layer 100. The external connection wiring layer 100 has a first plating film 103 as an external connection terminal, and a PSR film 101 as an electrical insulating material. The electronic parts-mounting layer 110 has a conductive film 113 as an internal conductor pattern and a PSR film 111 as an electrical insulating material. A surface of the conductive film 113 is in a same plane as a surface of the PSR film 111.
    Type: Application
    Filed: February 1, 2007
    Publication date: November 22, 2007
    Applicants: Hitachi Cable Ltd., NEC Electronics Corporation
    Inventors: Akira Chinda, Nobuaki Miyamoto, Koki Hirasawa, Kenji Uchida
  • Publication number: 20070235218
    Abstract: An electronic device substrate is formed of a thin-plate reinforcing substrate; an external connection wiring layer stacked on the reinforcing substrate, and comprising an electrical insulation provided on the reinforcing substrate, an opening formed in the electrical insulation, a first conductor pattern and a via-hole conductor provided in the opening and formed integrally with each other; and a second conductor pattern formed on the opposite side of the electrical insulation to the reinforcing substrate, and at least partially electrically connected to the via-hole conductor.
    Type: Application
    Filed: September 8, 2006
    Publication date: October 11, 2007
    Inventors: Nobuaki Miyamoto, Akira Chinda, Koki Hirasawa, Kenji Uchida
  • Patent number: 7268408
    Abstract: A wiring board which can realize a small and thin passive component such as solid condenser, resistor, coil, transistor or so on is provided. A wiring board which forms an electronic component by mounting a passive element, comprising an insulating board provided with an opening having predetermined pattern, a wiring formed with predetermined pattern on said insulating board, and an external terminal filled to said opening, connected with said wiring by said filling, and exposed to a bottom of said insulating board where said wiring is formed.
    Type: Grant
    Filed: January 21, 2003
    Date of Patent: September 11, 2007
    Assignee: Hitachi Cable Ltd.
    Inventors: Akira Chinda, Akira Matsuura, Takayuki Yoshiwa, Mamoru Mita, Takashi Kageyama, Katsutoshi Taga
  • Publication number: 20070034519
    Abstract: On both surfaces of an electric insulating material 1, a surface conductive layer 2A and a back surface conductive layer 2B are formed by transcription. Further, a via hole 5 penetrating through the surface conductive layer 2A and the electric insulating material 1 is provided. After forming a photosensitive plating resist pattern 14, the via hole 5 is filled with a copper plating filler 15, and the surface wiring layer 9A and the back surface wiring layer 9B are formed. Thereafter, the photosensitive plating resist pattern 14 as well as the surface conductive layer 2A and the back surface conductive layer 2B provided under the photosensitive plating resist pattern 14 are removed to fabricate a double-sided wiring board 11.
    Type: Application
    Filed: October 10, 2006
    Publication date: February 15, 2007
    Applicant: HITACHI CABLE, LTD.
    Inventors: Akira Chinda, Nobuaki Miyamoto, Manoru Mita