Patents by Inventor Akira Fujihara

Akira Fujihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8492904
    Abstract: One aspect of the present invention is a semiconductor device including: a semiconductor substrate; a first wiring that is formed on the semiconductor substrate; a second wiring that is formed to cross over the first wiring with a space interposed therebetween at a cross portion in which the first wiring and the second wiring cross each other; a protective film that is formed on the semiconductor substrate to cover at least a part of the first wiring, the part being located under the second wiring in the cross portion; and an insulator film that is formed in an island shape on the protective film under the second wiring in the cross portion to be located between edges of the protective film and to cover the first wiring in the cross portion.
    Type: Grant
    Filed: April 19, 2010
    Date of Patent: July 23, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Akira Fujihara
  • Patent number: 7851884
    Abstract: A FET exhibiting excellent uniformity and productivity and having a low noise figure and high associated gain as high-frequency performance, a semiconductor chip having this FET and a semiconductor device having the semiconductor chip. The FET includes a GaAs substrate on which are built up an i-type GaAs layer, an i-type InGaAs two-dimensional electron gas layer and an n-type AlGaAs electron supply layer. A gate electrode is provided on and in linear Schottky contact with the n-type AlGaAs electron supply layer. A n-type InGaP etching stop layer and then an n-type GaAs contact layer at the same lateral position are built up on the n-type AlGaAs electron supply layer, these being spaced away from both sides of the gate electrode. A source electrode and a drain electrode are provided on the n-type GaAs contact layer and are spaced away from edges of the contact layer as electrodes that make band-shaped ohmic contact.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: December 14, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Shuji Asai, Akira Fujihara, Makoto Matsunoshita, Naoki Sakura, Seiji Ichikawa
  • Publication number: 20100270687
    Abstract: One aspect of the present invention is a semiconductor device including: a semiconductor substrate; a first wiring that is formed on the semiconductor substrate; a second wiring that is formed to cross over the first wiring with a space interposed therebetween at a cross portion in which the first wiring and the second wiring cross each other; a protective film that is formed on the semiconductor substrate to cover at least a part of the first wiring, the part being located under the second wiring in the cross portion; and an insulator film that is formed in an island shape on the protective film under the second wiring in the cross portion to be located between edges of the protective film and to cover the first wiring in the cross portion.
    Type: Application
    Filed: April 19, 2010
    Publication date: October 28, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Akira FUJIHARA
  • Publication number: 20090078966
    Abstract: A FET exhibiting excellent uniformity and productivity and having a low noise figure and high associated gain as high-frequency performance, a semiconductor chip having this FET and a semiconductor device having the semiconductor chip. The FET includes a GaAs substrate on which are built up an i-type GaAs layer, an i-type InGaAs two-dimensional electron gas layer and an n-type AlGaAs electron supply layer. A gate electrode is provided on and in linear Schottky contact with the n-type AlGaAs electron supply layer. A n-type InGaP etching stop layer and then an n-type GaAs contact layer at the same lateral position are built up on the n-type AlGaAs electron supply layer, these being spaced away from both sides of the gate electrode. A source electrode and a drain electrode are provided on the n-type GaAs contact layer and are spaced away from edges of the contact layer as electrodes that make band-shaped ohmic contact.
    Type: Application
    Filed: September 24, 2008
    Publication date: March 26, 2009
    Applicant: NEC Electronics Corporation
    Inventors: Shuji Asai, Akira Fujihara, Makoto Matsunoshita, Naoki Sakura, Seiji Ichikawa
  • Publication number: 20080054302
    Abstract: Disclosed is a field effect transistor including: an electron supplying layer made of AlGaAs; an interface stabilizing layer, provided on the electron supplying layer, and not containing Al; an etching stop layer, provided on the interface stabilizing layer, and made of TnGaP; and a contact layer, provided on the etching stop layer, and made of GaAs. This prevents a interfacial layer such as an AlGaAsP layer from being formed in the interface between the AlGaAs electron supplying layer and the InGaP etching stop layer, and prevents deterioration in the Schottky characteristic.
    Type: Application
    Filed: August 24, 2007
    Publication date: March 6, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Akira FUJIHARA
  • Patent number: 5785763
    Abstract: A collimator is provided in an evaporation chamber to prevent the stray electrons from reaching a semiconductor substrate on which a film of the source is deposited. The collimator has a wall that prevent the stray electrons from reaching the evaporation object and a window that allows the gaseous evaporation source to travel to the object. The problem caused by the stray electrons can be solved with a simple structure, realizing a better evaporation process on the substrate.
    Type: Grant
    Filed: August 29, 1995
    Date of Patent: July 28, 1998
    Assignee: NEC Corporation
    Inventors: Kazuhiko Onda, Yasuko Hori, Akira Fujihara