Patents by Inventor Akira Hirano

Akira Hirano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240137128
    Abstract: An optical transmission system including an optical transmission device and an optical reception device that receives, via an optical transmission line, a signal transmitted from the optical transmission device, the optical transmission system including a transmission-mode selection unit that selects transmission mode information in descending order of priority out of transmission mode information, which is combinations of a plurality of parameters concerning transmission performance, the transmission mode information being a plurality of kinds of the transmission mode information common to the transmission performance of the optical transmission device and the optical reception device, a signal transmission unit that transmits, to the optical reception device, a signal modulated based on the selected transmission mode information, and a signal reception unit that receives the signal and modulates the received signal based on the transmission mode information selected by the transmission-mode selection unit.
    Type: Application
    Filed: December 21, 2022
    Publication date: April 25, 2024
    Inventors: Tetsuro Inui, Hideki Nishizawa, Seiji Okamoto, Akira Hirano, Shokei Kobayashi, Fumikazu Inuzuka, Seiki Kuwabara, Takafumi Tanaka, Kei Kitamura, Takuya Oda
  • Patent number: 11967659
    Abstract: Provided is a stable CdZnTe monocrystalline substrate having a small leakage current even when a high voltage is applied and having a lower variation in resistivity with respect to variations in applied voltage values. A semiconductor wafer comprising a cadmium zinc telluride monocrystal having a zinc concentration of 4.0 at % or more and 6.5 at % or less and a chlorine concentration of 0.1 ppm by mass or more and 5.0 ppm by mass or less, wherein the semiconductor wafer has a resistivity of 1.0×107 ?cm or more and 1.0×108 ?cm or less when a voltage of 900 V is applied, and wherein a ratio (variation ratio) of the resistivity at application of 0 V to the resistivity at application of a voltage of 900 V is 20% or less.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: April 23, 2024
    Assignee: JX METALS CORPORATION
    Inventors: Koji Murakami, Akira Noda, Ryuichi Hirano
  • Patent number: 11964871
    Abstract: To provide a novel immobilized product in which a carbon material and/or a silicon material is/are immobilized on a base material surface by a chemical bond via a linking group, and a method for producing the same. The immobilized product is an immobilized product in which a carbon material is immobilizing on a surface of a base material, wherein the carbon material is chemically bonded on the surface of the base material via a linking group, and the linking group is at least one selected from the group consisting of a —NH group, a —NH—R1—NH group, a —SO group, a R2 group, a —O—R3—O group, and a R4 group (in which the R1 to R4 each independently represent at least one selected from the group consisting of a chain alkyl group, a cyclic alkyl group, a chain alkenyl group, a cyclic alkenyl group, a chain alkynyl group, etc.).
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: April 23, 2024
    Assignee: STELLA CHEMIFA CORPORATION
    Inventors: Akira Ishimaru, Yoshinori Sato, Hironori Matsushita, Kazutaka Hirano, Tetsuo Nishida
  • Publication number: 20240100730
    Abstract: A method for manufacturing a battery includes: a first cutting step of cutting a laminate at a first cutting position to form a first cut surface, the laminate including at least one battery cell having a positive electrode layer, a negative electrode layer, and a solid electrolyte layer located between the positive electrode layer and the negative electrode layer; and a second cutting step of cutting the laminate cut in the first cutting step at a second cutting position inside the first cutting position to form a second cut surface. In the second cutting step, Rz1<W <5Rz1 is satisfied, where W denotes a distance between the first cut surface and the second cut surface to be formed and Rz1 denotes a surface roughness of the first cut surface.
    Type: Application
    Filed: December 4, 2023
    Publication date: March 28, 2024
    Inventors: KOICHI HIRANO, KAZUHIRO MORIOKA, AKIRA KAWASE
  • Publication number: 20240088348
    Abstract: A battery includes: a power generation element having a structure in which battery cells are laminated, each of the battery cells including an electrode layer, a counter electrode layer, and a solid electrolyte layer located between the electrode layer and the counter electrode layer. The power generation element includes a first pair of side surfaces facing each other, and a second pair of side surfaces facing each other and different from the first pair of side surfaces. At least one of the battery cells is provided with a recess where the solid electrolyte layer is receded with respect to the electrode layer and the counter electrode layer on each of the first pair of side surfaces. Surface roughness Rz2 of each of the second pair of side surfaces is smaller than surface roughness Rz1 of each of the first pair of side surfaces.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 14, 2024
    Inventors: KAZUHIRO MORIOKA, KOICHI HIRANO, AKIRA KAWASE
  • Patent number: 11923862
    Abstract: A first reception processing unit performs a process of receiving a first signal transmitted on a first transmission line, a second reception processing unit performs a process of receiving a second signal transmitted on a second transmission line, and an output speed control unit controls output speeds of the first signal and the second signal subjected to the reception process. A system switching unit selects and outputs the first signal or the second signal subjected to a reception process, and an output processing unit performs a process for output to another apparatus on the output from the system switching unit. A reception side clock output unit outputs a clock signal giving a processing timing of each process, and a clock frequency control unit adjusts a frequency of the clock signal giving the processing timing to the output processing unit.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: March 5, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Fumikazu Inuzuka, Kei Kitamura, Akira Hirano, Masahito Tomizawa, Takuya Ohara
  • Publication number: 20240072376
    Abstract: A battery includes battery cells. A battery cell includes a positive electrode active material layer, a negative electrode active material layer, and a solid electrolyte layer disposed between the positive electrode active material layer and the negative electrode active material layer. On a side surface of the battery cell, in a plan view of the side surface of the battery cell, striated cut marks which are inclined with respect to the thickness direction of the battery cell are provided.
    Type: Application
    Filed: November 7, 2023
    Publication date: February 29, 2024
    Inventors: Kazuyoshi HONDA, Koichi HIRANO, Akira KAWASE, Kazuhiro MORIOKA
  • Publication number: 20240072392
    Abstract: A battery includes: a power generation element including battery cells each of which includes an electrode layer, a counter-electrode layer, and a solid electrolyte layer located between the electrode layer and the counter-electrode layer, and which are electrically connected in parallel and stacked; an insulating member covering an electrode layer at a side surface of the power generation element; and a terminal electrode covering the side surface and the insulating member, and electrically connected to a counter-electrode layer, in which the power generation element includes: a first parallel unit that includes first battery cells and has both ends in a stacking direction at each of which a counter-electrode layer is located; and a second parallel unit that includes second battery cells, has both ends in the stacking direction at each of which an electrode layers is located, and is stacked on the first parallel unit.
    Type: Application
    Filed: November 7, 2023
    Publication date: February 29, 2024
    Inventors: Kazuyoshi HONDA, Eiichi KOGA, Koichi HIRANO, Akira KAWASE, Kazuhiro MORIOKA
  • Publication number: 20240072381
    Abstract: A battery includes: a power generation element including battery cells which are electrically connected in parallel and stacked, and each of which includes an electrode layer, a counter-electrode layer, and a solid electrolyte layer located between the electrode layer and the counter-electrode layer; an electrode insulating layer covering an electrode layer among the electrode layers at a side surface of the power generation element; and a counter-electrode terminal covering the side surface and the electrode insulating layer, and electrically connected to a counter-electrode layer among the counter-electrode layers.
    Type: Application
    Filed: November 7, 2023
    Publication date: February 29, 2024
    Inventors: Kazuyoshi HONDA, Eiichi KOGA, Koichi HIRANO, Akira KAWASE
  • Patent number: 11916685
    Abstract: A transmission apparatus includes redundant first communication devices configured to communicate with a communication apparatus provided in a first network, and redundant second communication devices configured to communicate with a communication apparatus provided in a second network. The second communication devices include respective first ends that are ends of redundant communication paths of the first communication devices, and the first communication devices include respective second ends that are ends of redundant communication paths of the second communication devices.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: February 27, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Kei Kitamura, Fumikazu Inuzuka, Akira Hirano, Masahito Tomizawa, Takuya Ohara
  • Patent number: 11898811
    Abstract: A heat exchanger includes: a heat exchange core portion; and a tank portion connected to the heat exchange core portion. The heat exchange core portion has a connection plate that surrounds a part of the tank portion from an outer peripheral side. The connection plate has slit-shaped openings arranged along an edge of the connection plate in a first direction. A part of the connection plate between each of the openings and the edge is deformable into a concave shape toward the tank portion. A part of the openings has a widened portion at both ends in the first direction. A width dimension of the widened portion in a second direction from the opening to the edge is larger than that of the other portion of the opening.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: February 13, 2024
    Assignee: DENSO CORPORATION
    Inventors: Akira Hirano, Taichi Asano
  • Patent number: 11902137
    Abstract: An estimation method includes: generating information regarding success or not success in a connectivity checking test between “N” nodes in a case in which a failure occurs in a verification target path including the nodes, the information being generated as pattern information for each failure location; selecting “M” network devices from among a plurality of network devices in accordance with occurrence of the failure; executing the connectivity checking test between the selected network devices; comparing a checking result of the connectivity checking test with pattern information that satisfies “N=M” in the pattern information; and estimating the failure location in the service path based on the failure location associated with the pattern information in a case in which the pattern information that satisfies “N=M” matches the checking result.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: February 13, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Takuya Oda, Shokei Kobayashi, Akira Hirano
  • Patent number: 11876670
    Abstract: A fault diagnosis unit (42) of a fault diagnosis apparatus (4) performs a fault diagnosis of a communication network (2) with a probabilistic inference algorithm using information on the communication network (2) having been gathered by an NW monitoring unit (41). A diagnosis result determining unit (43) determines test items for confirming and determining a diagnosis result of the fault diagnosis. A test performing unit (44) performs a confirmation test of the determined test items. The diagnosis result determining unit (43) determines a likelihood of the diagnosis result of the fault diagnosis based on a result of the confirmation test.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: January 16, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Takuya Oda, Shokei Kobayashi, Akira Hirano
  • Patent number: 11853101
    Abstract: An adapting device according to an embodiment includes: a first storage unit configured to store correspondence information representing a correspondence relation between processing requested by a higher-level system and a method for implementing the processing in a lower-level system; a conversion unit configured to convert a processing request from the higher-level system to the lower-level system into a processing procedure capable of being implemented in the lower-level system and supply the processing procedure to the lower-level system; and an additional information processing unit configured to generate additional information to be supplied to the lower-level system together with the processing procedure.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: December 26, 2023
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Takuya Oda, Shokei Kobayashi, Akira Hirano
  • Patent number: 11840115
    Abstract: An axle structure is provided with an axle housing for internally passing an axle shaft having wheels connected to both left and right ends thereof, and a drive motor unit. The axle housing includes a large diameter housing center portion having a recessed portion which is recessed from an opening portion on a front surface side toward a rear surface side, and small diameter hollow shaft portions connected as a left and right pair to both sides of the housing center portion. The drive motor unit is fitted into the recessed portion and is bolted to the axle housing by means of tightening bolts.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: December 12, 2023
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Kazunori Ogawa, Akira Hirano
  • Publication number: 20230307578
    Abstract: A nitride semiconductor ultraviolet light-emitting element is provided. The element includes a light-emitting element with n-type, active, and p-type layers stacked vertically and made of AlGaN-based wurtzite structured semiconductors. The active layer has a quantum-well structure and each layer is epitaxially grown having a surface on which multi-step terraces parallel to the (0001) plane are formed. The n-type layer has a stratiform regions with locally lower AlN mole fraction which is inclined with respect to an upper surface of the n-type layer. The p-type layer has a lowermost electron blocking layer and an uppermost contact layer. Each semiconductor layer in the active layer and the electron blocking layer have inclined regions with respect to the (0001) plane connecting adjacent terraces of the multi-step terraces, and terrace regions other than inclined regions. An AlN mole fraction of the terrace regions in the electron blocking layer is between 69% and 89%, inclusive.
    Type: Application
    Filed: September 17, 2020
    Publication date: September 28, 2023
    Applicant: NIKKISO CO., LTD.
    Inventors: Akira HIRANO, Yosuke NAGASAWA
  • Publication number: 20230299232
    Abstract: A nitride semiconductor ultraviolet light-emitting element is provided. The element includes a light-emitting element structure part with an n-type layer, an active layer, and a p-type layer stacked vertically, which are made of AlGaN-based semiconductors with wurtzite structure. The n-type layer has an n-type AlGaN-based semiconductor, the active layer has well layers including an AlGaN based semiconductor, and the p-type layer has a p-type AlGaN-based semiconductor. Each semiconductor layer in the n-type and the active layers is an epitaxially grown layer having a surface on which multi-step terraces parallel to the (0001) plane are formed. The n-type layer has first Ga-rich regions which include n-type AlGaN regions in which an AlGaN composition ratio is an integer ratio of Al2Ga1N3. The well layer includes a second Ga-rich region, which includes an AlGaN region in which an AlGaN composition ratio is an integer ratio of Al1Ga1N2 or Al5Ga7N12.
    Type: Application
    Filed: July 7, 2020
    Publication date: September 21, 2023
    Applicant: Soko Kagaku Co., Ltd.
    Inventors: Akira HIRANO, Yosuke NAGASAWA
  • Patent number: 11731900
    Abstract: Glass for a vehicle includes a glass plate; a test-region A demarcated in the glass plate, the test-region A being specified in JIS R3212; a shielding layer provided more outwardly than the test-region A in a plan view; an information transmission/reception region demarcated within an opening portion provided in the shielding layer, and through which a device mounted in the vehicle transmits/receives information; and an infrared reflective layer positioned peripheral to the information transmission/reception region in a plan view, the infrared reflective layer having a portion that overlaps with the shielding layer in a plan view, wherein a solar direct transmittance of the test-region A is 60% or less and a solar direct reflectance of a region in which the infrared reflective layer is provided peripheral to the information transmission/reception region is greater than a solar direct reflectance of the test-region A by at least 5%.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: August 22, 2023
    Assignee: AGC Inc.
    Inventors: Shunsuke Sadakane, Ryota Nakamura, Akira Hirano
  • Publication number: 20230261139
    Abstract: A nitride semiconductor ultraviolet light-emitting element is provided. The element includes a light-emitting element structure part with an n-type layer, an active layer, and a p-type layer stacked vertically, which are made of AlGaN-based semiconductors with wurtzite structure. The n-type layer has an n-type AlGaN-based semiconductor, the active layer has well layers including an AlGaN based semiconductor, and the p-type layer has a p-type AlGaN-based semiconductor. Each semiconductor layer in the n-type and the active layers is an epitaxially grown layer having a surface on which multi-step terraces parallel to the (0001) plane are formed. The n-type layer has first Ga-rich regions which include n-type AlGaN regions in which an AlGaN composition ratio is an integer ratio of Al7Ga5N12, and each extending direction of the stratiform regions is inclined with respect to the upper surface of the n-type layer.
    Type: Application
    Filed: August 21, 2020
    Publication date: August 17, 2023
    Applicant: Soko Kagaku Co., Ltd.
    Inventors: Akira HIRANO, Yosuke NAGASAWA
  • Publication number: 20230207731
    Abstract: A nitride semiconductor ultraviolet light-emitting element is provided. The element includes a light-emitting element structure part with an n-type layer, an active layer, and a p-type layer stacked vertically, which are made of AlGaN-based semiconductors with wurtzite structure. The n-type layer has an n-type AlGaN-based semiconductor, the active layer has well layers including an AlGaN based semiconductor, and the p-type layer has a p-type AlGaN-based semiconductor. Each semiconductor layer in the n-type and the active layers is an epitaxially grown layer having a surface on which multi-step terraces parallel to the (0001) plane are formed. The n-type layer has first Ga-rich regions which include n-type AlGaN regions in which an AlGaN composition ratio is an integer ratio of Al1Ga1N2. The well layer includes a second Ga-rich region, which includes an AlGaN region in which an AlGaN composition ratio is an integer ratio of Al1Ga2N3.
    Type: Application
    Filed: June 24, 2020
    Publication date: June 29, 2023
    Applicant: NIKKISO CO., LTD.
    Inventors: Akira HIRANO, Yosuke NAGASAWA