Patents by Inventor Akira Horie

Akira Horie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5929519
    Abstract: An inverter device includes plural modules, each module being formed by a series circuit having a parallel circuit of a switching device and a first diode, and a parallel circuit of a second switching device and a second diode, allowing a reduced size, high reliability, high frequency switching and low noise. Each of the semiconductor modules includes a plurality of switching device chips and at least one diode chip formed on a metal substrate. Electrode plates are provided in locations of the module adjacent to the switching device chips and the diode chips to facilitate connection of the electrodes of the respective chips to one another and to the outside of the module.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: July 27, 1999
    Assignee: Hitchi, Ltd.
    Inventors: Mutsuhiro Mori, Ryuichi Saito, Shin Kimura, Syuuji Saitoo, Kiyoshi Nakata, Akira Horie, Yoshihiko Koike, Shigeki Sekine
  • Patent number: 5801936
    Abstract: An inverter device includes plural modules, each module being formed by a series circuit having a parallel circuit of a first switching device and a first diode, and a parallel circuit of a second switching device and a second diode, allowing a reduced size, high reliability, high frequency switching and low noise.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 1, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Mutsuhiro Mori, Ryuichi Saito, Shin Kimura, Kiyoshi Nakata, Syuuji Saitoo, Akira Horie, Yoshihiko Koike, Shigeki Sekine
  • Patent number: 5731970
    Abstract: An inverter device includes plural modules, each module being formed by a series circuit having a parallel circuit of a first switching device and a first diode, and a parallel circuit of a second switching device and a second diode, allowing a reduced size, high reliability, high frequency switching and low noise. Each module forms one arm portion of the inverter. Lifetimes of the diodes and the switching devices are set in a manner to equalize losses in the inverter. Preferably, insulated gate bipolar transistors (IGBTs) formed by diffusion are used as the switching devices since the lifetimes of these devices can easily be adjusted to optimize design of the inverter.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: March 24, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Mutsuhiro Mori, Ryuichi Saito, Shin Kimura, Syuuji Saitoo, Kiyoshi Nakata, Akira Horie, Yoshihiko Koike, Shigeki Sekine
  • Patent number: 5638266
    Abstract: The invention is directed to a neutral point clamped electric power conversion apparatus having four semiconductor switching elements connected in series. The capacity of outer free wheel diodes connected in reverse parallel with outer semiconductor switching elements are increased compared to that of inner free wheel diodes, thereby minimizing, an imbalance in losses between the inner and the outer free wheel diodes.
    Type: Grant
    Filed: March 10, 1995
    Date of Patent: June 10, 1997
    Assignees: Hitachi, Ltd., Hitachi Mito Engineering Co., Ltd.
    Inventors: Akira Horie, Syuuji Saitou, Hiroshi Itahana
  • Patent number: 5583385
    Abstract: In order to reduce an induction problem, which might otherwise be caused by a higher-harmonic current leaking to the outside of an inverter device, with a simple construction, an inverter device casing and a heat receiving plate mounted thereon are insulated from each other, and the heat receiving plate and a filter capacitor in the power supply circuit are connected through a predetermined inductance. Since the higher harmonics current is bypassed to the filter capacitor through the resonance filter which is formed by of the electrostatic capacity in a switching element and the inductance, the induction problem can be reduced by simple construction.
    Type: Grant
    Filed: June 14, 1994
    Date of Patent: December 10, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Akira Horie, Syuuji Saitou, Takayuki Matui, Ken Itoh, Takashi Tsuboi, Eiichi Toyota
  • Patent number: 5535114
    Abstract: A power converter including a snubber circuit which is smaller and regenerates more energy than a conventional snubber circuit. A plurality of self-quenching semiconductor switching elements are connected in series across a power supply. A capacitive element is connected to the switching elements, and is charged to more than the voltage of the power supply by a snubber action due to operation of any of the switching elements. The charge stored in the capacitive element is then regenerated to the power supply. The capacitance of the capacitive element can be almost as small as a minimum required capacitance, and can be as small as one-tenth of the capacitance required in a conventional snubber circuit, thereby providing a power converter which is smaller and has a smaller snubber loss than a conventional power converter.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: July 9, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Akira Horie, Yoshio Tsutsui, Takeshi Ando, Takayuki Matsui, Eiichi Toyota, Syuuji Saitoo
  • Patent number: 5461556
    Abstract: A power converter including a snubber circuit which is smaller and regenerates more energy than a conventional snubber circuit. A plurality of self-quenching semiconductor switching elements are connected in series across a power supply. A capacitive element is connected to the switching elements, and is charged to more than the voltage of the power supply by a snubber action due to operation of any of the switching elements. The charge stored in the capacitive element is then regenerated to the power supply. The capacitance of the capacitive element can be almost as small as a minimum required capacitance, and can be as small as one-tenth of the capacitance required in a conventional snubber circuit, thereby providing a power converter which is smaller and has a smaller snubber loss than a conventional power converter.
    Type: Grant
    Filed: October 22, 1992
    Date of Patent: October 24, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Akira Horie, Yoshio Tsutsui, Takeshi Ando, Takayuki Matsui, Eiichi Toyota, Syuuji Saitoo
  • Patent number: 5459655
    Abstract: An inverter device includes plural modules, each module being formed by a series circuit having a parallel circuit of a first switching device and a first diode, and a parallel circuit of a second switching device and a second diode, allowing a reduced size, high reliability, high frequency switching and low noise. Each module forms one arm portion of the inverter. Lifetimes of the diodes and the switching devices are set in a manner to equalize losses in the inverter. Preferably, insulated gate bipolar transistors (IGBTs) formed by diffusion are used as the switching devices since the lifetimes of these devices can easily be adjusted to optimize design of the inverter.
    Type: Grant
    Filed: September 21, 1992
    Date of Patent: October 17, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Mutsuhiro Mori, Ryuichi Saito, Shin Kimura, Kiyoshi Nakata, Syuuji Saitoo, Akira Horie, Yoshihiko Koike, Shigeki Sekine
  • Patent number: 5400242
    Abstract: In a multi-series inverter arrangement comprising a DC circuit including a neutral point output terminal and a multi-series inverter including three series connections of first through fourth GTOs, each connected in parallel with the DC circuit, the juncture of the first and second GTOs and the juncture of the third and fourth GTOs being connected to the neutral point output terminal via respective clamping diodes and the first and third GTOs and the second and fourth GTOs being on and off controlled each other in a conjugate relationship, individual gate driving circuits for the second and third GTOs being designed to provide a larger gate current, in particular, a larger wide width gate forward current to the corresponding GTOs than that provided by individual gate driving circuits for the first and fourth GTOs to the corresponding GTOs.
    Type: Grant
    Filed: February 24, 1993
    Date of Patent: March 21, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Ando, Akira Horie, Yoshio Tsutsui
  • Patent number: 5334258
    Abstract: Disclosed is a washing method in which parts and products are washed free of residual smudges without using fleon-family solvents. The method of washing members such as parts or products comprises a first degreasing step for degreasing in nonaqueous liquid the members to be washed after worked, a second degreasing step for degreasing the members being washed in an aqueous liquid which dissolves the nonaqueous liquid, a finish washing step for washing in the aqueous liquid, a rinsing step, and a drying step, wherein the drying step is performed in a plurality of pure water baths, the temperature of a last pure water bath is established to a range of 70.degree. to 85.degree. C., and the washed members are taken out from the pure water bath for drying the surfaces thereof.Also, the washing method is disclosed in which pure water in a plurality of the pure water baths has temperature gradient in the sequence of washing steps.
    Type: Grant
    Filed: July 14, 1992
    Date of Patent: August 2, 1994
    Assignee: Canon Kabushiki Kaisha
    Inventors: Nagato Osano, Yukihiro Imai, Akihito Hosaka, Ikuo Nakajima, Toshiji Nishiguchi, Akira Horie
  • Patent number: 4924168
    Abstract: In a PWM-controlled, variable voltage/variable frequency inverter, a pulse mode, which is identified by a number of voltage pulses within one cycle of an output AC voltage of the inverter, is changed in accordance with a frequency of the output AC voltage and an output AC voltage factor, which is a ratio of an output AC voltage to be produced by the inverter at that time to a maximum value of the output AC voltage which can be produced under a then-present value of a voltage of a DC voltage source for the inverter.
    Type: Grant
    Filed: July 12, 1989
    Date of Patent: May 8, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Akira Horie, Yoshiji Jimbo
  • Patent number: 4785225
    Abstract: A control apparatus for an induction motor comprises a variable voltage, variable frequency inverter feeding the motor, which is controlled by the PWM control. A secondary current component and an exciting current component of the motor are obtained by the calculation on the basis of a motor current and an actual slip frequency of the motor. From the thus obtained secondary current component, an actual torque produced by the motor is calculated. A frequency reference for the PWM control is obtained by the comparison result of the actual torque and a torque reference. A modulation factor reference for the PWM control is obtained by the comparison of the exciting current component and an exciting current reference. According to this control apparatus, the torque of the induction motor can be controlled to follow the torque reference with a high accuracy.
    Type: Grant
    Filed: October 7, 1987
    Date of Patent: November 15, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Akira Horie, Yoshiji Jimbo, Kingo Abe, Jinkoo Choo, Seiki Amikura, Yozo Tsuzuki
  • Patent number: 4672525
    Abstract: An inverter using gate turn-off thyristors (GTOs) is controlled by means of pulse width modulation (PWM) to control the speed of an induction motor. If the current flowing through the induction motor becomes an overcurrent which can still be cut off by the GTOs, a gate off signal is supplied to respective GTOs to interrupt the overcurrent. If any one of arms respectively corresponding to phases is short-circuited, a gate on signal is supplied to all GTOs to distribute the short circuit current among the arms, and the main circuit is interrupted by a high-speed breaker. At this time, a simultaneous gate on signal is given priority. If the simultaneous gate on signal is present, a simultaneous gate off signal is disabled. Owing to this configuration, destruction of the GTOs due to consecutive guard operation can be prevented.
    Type: Grant
    Filed: January 23, 1986
    Date of Patent: June 9, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Akira Horie, Shigetoshi Okamatsu
  • Patent number: 4644240
    Abstract: A reverse-conducting GTO thyristor comprises a gate turn-off thyristor and a diode which are formed on a single semiconductor substrate so as to have a common layer and be connected electrically in an inverse-parallel connection. A power converter is composed of a plurality of pairs of these reverse-conducting GTO thyristors connected in series, each pair of thyristors being controlled so that they are turned on and off in opposite phases. An OFF gate pulse for one of each pair of thyristors continues from a time on or after the generation of an ON gate pulse for the other thyristor to the time when a recovery current flowing through the diode portion of the first thyristor is extinguished. The thus-extended OFF gate pulse functions to prevent any displacement current flowing through the GTO portion of the first thyristor during the recovery time for the diode portion thereof.
    Type: Grant
    Filed: June 25, 1984
    Date of Patent: February 17, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Akira Horie, Takashi Tsuboi
  • Patent number: 4626888
    Abstract: In accordance with the present invention, a plurality of strip-shaped emitter layers on the cathode side are radially arranged on one main surface of the semiconductor substrate while forming a plurality of rings. A gate electrode is in ohmic contact with a part of a base layer which surrounds and is adjacent to each of said emitter layers on the cathode side. Between rings formed by said emitter layers on the cathode side, a ring-shaped gate collecting electrode is provided to be connected to said gate electrode. The gate collecting electrode is provided at a position to balance the potential differences produced by gate currents respectively corresponding to inside and outside of said gate collecting electrode.
    Type: Grant
    Filed: November 10, 1983
    Date of Patent: December 2, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Takahiro Nagano, Tsutomu Yatsuo, Saburo Oikawa, Akira Horie
  • Patent number: 4500903
    Abstract: A gate turn-off thyristor in which a cathode-emitter layer is divided into a plurality of strip-like regions which are radially arrayed on a major surface of a semiconductor substrate in a coaxial multi-ring pattern including a plurality of coaxially arrayed rings. The cathode-emitter strips belonging to a given one of the rings have some radial length. The cathode-emitter strips belonging to the inner ring of a coaxial multi-ring pattern have a smaller radial length than that of the cathode-emitter strips constituting the outer ring. A cathode electrode is contacted to the cathode-emitter strip in low resistance ohmic contact. A gate electrode is ohmic contacted with a low resistance to a cathode-base layer located adjacent to the cathode-emitter strip so as to enclose it. An anode electrode is ohmic contacted with a low resistance to the anode-emitter layer. With the structure of GTO, turn-off operation of unit GTO's each including a cathode-emitter strip is equalized.
    Type: Grant
    Filed: June 3, 1982
    Date of Patent: February 19, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Tsutomu Yatsuo, Takahiro Nagano, Saburo Oikawa, Akira Horie
  • Patent number: 3932147
    Abstract: The present invention relates to a method of manufacturing a gas rich in methane by subjecting two varieties or more of hydrocarbons having more than 2 carbon atoms per molecule and different mean molecular weights to steam-reforming process comprising at least two stages, wherein a mixture consisting of hydrocarbons whose means molecular weight is relatively small and steam is introduced to the nickel-containing catalyst bed for the first stage at a temperature in the range of 350.degree. to 550.degree.C, and subsequently, the resulting product is mixed with hydrocarbons whose mean molecular weight is larger than that of the preceding hydrocarbon -- along with steam, if necessary -- and is introduced to the nickel-containing catalyst bed at a temperature in the range of 300.degree. to 550.degree.C for the second stage.
    Type: Grant
    Filed: September 9, 1974
    Date of Patent: January 13, 1976
    Assignee: Japan Gasoline Co., Ltd.
    Inventors: Akio Okagami, Akira Horie, Tsutomu Toida