Patents by Inventor Akira Iga

Akira Iga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8166523
    Abstract: An authentication device that the user wears reads biometrics information and executes individual authentication by verification. Only when the individual authentication has been successfully performed, authentication with an external unit (such as a server) can be started. Then, only when both the individual authentication based on the biometrics information and the mutual authentication between the external unit (such as a server) and the authentication device have been successfully performed, subsequent data processing, such as payment processing, can be executed. Therefore, even if a fraudulent third party uses a stolen authentication device, because the party cannot satisfy the start condition of authentication with the external server or a PC, fraudulent transactions and other illegitimate behaviors are effectively prevented.
    Type: Grant
    Filed: August 13, 2002
    Date of Patent: April 24, 2012
    Assignee: Sony Corporation
    Inventors: Tadashi Ezaki, Akira Iga
  • Patent number: 7482977
    Abstract: Disclosed is a flat-type antenna apparatus which has a radiating conductor and a reference conductor disposed opposite to each other and performs feeding between the radiating conductor and the reference conductor at a position offset from the center of the radiating conductor center. The antenna includes: an insulative material layer which has relative magnetic permeability greater than 1 and is placed in a gap between the radiating conductor and the reference conductor; and a short-circuiting conductor which is disposed at a position to suppress unintended excitation and enables electric conduction between the radiating conductor and the reference conductor.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: January 27, 2009
    Assignee: Sony Corporation
    Inventors: Shinichi Kuroda, Tomoya Yamaura, Akira Iga, Katsumi Okayama
  • Publication number: 20050253756
    Abstract: Disclosed is a flat-type antenna apparatus which has a radiating conductor and a reference conductor disposed opposite to each other and performs feeding between the radiating conductor and the reference conductor at a position offset from the center of the radiating conductor center. The antenna includes: an insulative material layer which has relative magnetic permeability greater than land is placed in a gap between the radiating conductor and the reference conductor; and a short-circuiting conductor which is disposed at a position to suppress unintended excitation and enables electric conduction between the radiating conductor and the reference conductor.
    Type: Application
    Filed: March 8, 2005
    Publication date: November 17, 2005
    Applicant: Sony Corporation
    Inventors: Shinichi Kuroda, Tomoya Yamaura, Akira Iga, Katsumi Okayama
  • Publication number: 20030037264
    Abstract: An authentication device which the user wears reads biometrics information and executes individual authentication by verification. Only when the individual authentication has been successfully performed, authentication with an external unit (such as a server) can be started. Then, only when both of the individual authentication based on the biometrics information and the mutual authentication between the external unit (such as a server) and the authentication device have been successfully performed, subsequent data processing such as payment processing can be executed. Therefore, even if a fraudulent third party uses a stolen authentication device, because the party cannot satisfy the start condition of authentication with the external server or a PC, fraudulent transactions and other illegitimate behaviors are effectively prevented.
    Type: Application
    Filed: August 13, 2002
    Publication date: February 20, 2003
    Inventors: Tadashi Ezaki, Akira Iga
  • Patent number: 6126077
    Abstract: Method and apparatus for providing communication with a higher communication rate while maintaining the occupied frequency band narrow, a signal processing unit of a reader/writer unit Biphase Shift Keying (BPSK)-modulates data to be transmitted, and thereafter outputs the modulated signal to a modem. The modem Amplitude Shift Keying (ASK)-modulates the modulated signal and outputs the ASK-modulated signal to a first loop coil. The first loop coil generates a magnetic field corresponding to the modulated wave. An IC card converts a part of the magnetic field radiated from the reader/writer unit with another loop coil to generate a power source from the electrical signal, and also extracts the data transmitted. In the case of transmitting the data to the reader/writer unit, a load of another loop coil is changed in accordance with the data. The reader/writer unit detects, with the first loop coil, any change in load of another loop coil of the IC card magnetically coupled with the first loop coil.
    Type: Grant
    Filed: June 10, 1997
    Date of Patent: October 3, 2000
    Assignee: Sony Corporation
    Inventors: Katsuyuki Tanaka, Shigeru Arisawa, Susumu Kusakabe, Akira Iga
  • Patent number: 4491943
    Abstract: A method for transmitting time-sharing multidata in which data series of a plurality of channels are time-sharing multiplexed to form a transmitting data series having the steps of adding error detecting or error correcting redundant bits and synchronizing redundant bits to predetermined number of information bits contained in the respective data series of the channels to form one transmitting unit, forming bit groups in a manner as to take each bit corresponding to each other between the channels as one group with respect to the information bits, the error detecting or error correcting redundant bits and the synchronizing redundant bits of said one transmitting unit of each of the channels, time-sharing multiplexing the data series so as to form one frame in which these bit groups are sequentially continued to each other and using the synchronizing redundant bits as a frame synchronizing signal of the transmitting data series.
    Type: Grant
    Filed: February 10, 1982
    Date of Patent: January 1, 1985
    Assignee: Sony Corporation
    Inventors: Akira Iga, Kentaro Odaka, Nobuyuki Yasuda
  • Patent number: 4355392
    Abstract: In a digital signal transmission system, a predetermined number of words of digital information signals are added bit by bit in a modulo 2 adder to produce a first parity signal. The information signals and the first parity signal are delayed so as to have different delay times to each other, and the signals thus delayed are again added bit by bit in a modulo-2 adder to produce a second parity signal. The predetermined number of words of information signals and first and second parity signals are serially transmitted through a transmission line.
    Type: Grant
    Filed: December 19, 1980
    Date of Patent: October 19, 1982
    Assignee: Sony Corporation
    Inventors: Toshitada Doi, Akira Iga
  • Patent number: 4238852
    Abstract: Blocks of digital words containing an error correcting word are time interleaved into time-interleaved blocks of words, each of which contains no more than one word from any one of the original blocks. The time-interleaved blocks of words are converted to a bit-by-bit serial digital data stream which is time-base compressed to permit insertion therein of an error detecting code word and synchronizing signals. The resulting serial data stream may be recorded on a VTR. After reproduction, each time interleaved block is checked for errors and is then time de-interleaved to reconstruct the original blocks of digital words. If one or more errors exist in words in a time-interleaved block, no more than a single word in any one of the time de-interleaved blocks contains an error. Single-word errors in a reconstructed block are corrected using the error correcting word accompanying the reconstructed block.
    Type: Grant
    Filed: April 16, 1979
    Date of Patent: December 9, 1980
    Assignee: Sony Corporation
    Inventors: Akira Iga, Toshitada Doi
  • Patent number: 4194095
    Abstract: A fluid flow control system has a fluid source and plural flow pipes connected to the fluid source. Each of the pipes has an opening of a specific area corresponding to one of the bit orders of a PCM (Pulse Code Modulated) input signal. The flow-condition of the fluid through each of the pipes is controlled by the PCM signal without changing the PCM signal to an analog signal. The summation of the outflow from each of the pipes combines to produce an analog flow output signal in response to the PCM input signal.
    Type: Grant
    Filed: January 6, 1978
    Date of Patent: March 18, 1980
    Assignee: Sony Corporation
    Inventors: Toshitada Doi, Akira Iga, Osamu Hamada, Jyoji Hukuda, Yuichiro Hamada
  • Patent number: 4189710
    Abstract: In code transmission, an information bit has added thereto a first redundant bit which is not evenly divisible by a generation polynomial expression even when all of the information bits are "0" or "1". The code, including the information bits and the first redundant bit, is divided by the generation polynomial expression to provide a second redundant bit as the residue of such division, which is added to the information bit to provide a resultant code which is transmitted. The first redundant bit is added to the received code, which is then divided by the generation polynomial expression to detect the introduction of an error in the transmission path by the existence of a residue of the last division.
    Type: Grant
    Filed: May 11, 1978
    Date of Patent: February 19, 1980
    Assignee: Sony Corporation
    Inventor: Akira Iga
  • Patent number: 4138694
    Abstract: A video signal recorder/reproducer is used to record and/or reproduce pulse signals in successive tracks on a record medium. During recording, the pulse signals, which may, as one example, represent audio information, are interleaved with simulated horizontal and vertical synchronizing signals of the type similar to the synchronizing signals which normally are included in a composite video signal. During signal reproduction, the reproduced simulated horizontal and vertical synchronizing signals are detected and used to control the recovery of data from the reproduced pulse signals.
    Type: Grant
    Filed: February 23, 1977
    Date of Patent: February 6, 1979
    Assignee: Sony Corporation
    Inventors: Toshitada Doi, Akira Iga
  • Patent number: 4121205
    Abstract: A power amplifier has an input terminal supplied with a PCM (pulse code modulated) signal and a plurality of power supplies, each producing a voltage weighted according to the order of bits of the PCM-code. Switching means are controlled by the PCM input signal to connect selective ones of the power supplies in series to a load in response to the PCM signal.
    Type: Grant
    Filed: January 31, 1977
    Date of Patent: October 17, 1978
    Assignee: Sony Corporation
    Inventors: Akira Iga, Toshitada Doi
  • Patent number: 4002927
    Abstract: A pulse control circuit comprising a first FET (Field Effect Transistor), put into the conductive state in response to an input pulse signal, a first time constant circuit charged when the first FET is put in the conductive state, a second FET put into the conductive state with the charging voltage of the first time constant circuit, and a second time constant circuit discharging the charged electricity in the first time constant circuit when the second FET is put in the conductive state.
    Type: Grant
    Filed: May 22, 1975
    Date of Patent: January 11, 1977
    Assignee: Sony Corporation
    Inventors: Hideo Nakamura, Akira Iga
  • Patent number: RE31666
    Abstract: In a digital signal transmission system, a predetermined number of words of digital information signals are added bit by bit in a modulo 2 adder to produce a first parity signal. The information signals and the first parity signal are delayed so as to have different delay times to each other, and the signals thus delayed are again added bit by bit in a modulo-2 adder to produce a second parity signal. The predetermined number of words of information signals and first and second parity signals are serially transmitted through a transmission line.
    Type: Grant
    Filed: May 6, 1983
    Date of Patent: September 11, 1984
    Assignee: Sony Corporation
    Inventors: Toshitada Doi, Akira Iga