Patents by Inventor Akira Isikawa

Akira Isikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10845650
    Abstract: A curved surface display comprises: a first substrate that is curved such that a portion located at a center in a first direction is convex or concave toward a display surface side compared with portions located at both ends in the first direction; a second substrate that is curved along the first substrate while disposed opposite the first substrate; and a sealing material that bonds the first substrate and the second substrate together. The sealing material includes a first sealing section extending in a second direction and a second sealing section extending in the first direction. A width of the first sealing section is larger than a width of the second sealing section.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: November 24, 2020
    Assignee: Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Yoshiki Nakano, Akira Isikawa, Masafumi Hirata, Tsutomu Abe, Naotoshi Sumiya, Takeshi Aramaki, Masashi Kuno
  • Publication number: 20180348557
    Abstract: A curved surface display comprises: a first substrate that is curved such that a portion located at a center in a first direction is convex or concave toward a display surface side compared with portions located at both ends in the first direction; a second substrate that is curved along the first substrate while disposed opposite the first substrate; and a sealing material that bonds the first substrate and the second substrate together. The sealing material includes a first sealing section extending in a second direction and a second sealing section extending in the first direction. A width of the first sealing section is larger than a width of the second sealing section.
    Type: Application
    Filed: August 7, 2018
    Publication date: December 6, 2018
    Inventors: Yoshiki NAKANO, Akira ISIKAWA, Masafumi HIRATA, Tsutomu ABE, Naotoshi SUMIYA, Takeshi ARAMAKI, Masashi KUNO
  • Patent number: 7648863
    Abstract: A manufacturing method of a semiconductor device which can decrease the degradation of an element due to plasma in the LDD formation process is provided. The degradation of an element due to plasma is decreased by forming an element having an LDD structure according to a manufacturing method of a semiconductor device using a hard mask. Covering the substrate by an electrically conductive film allover, the density of electric charge accumulated in a gate electrode in the plasma process such as anisotropic etching can be reduced, and the degradation due to plasma process can be reduced.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: January 19, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Akira Isikawa
  • Publication number: 20080299737
    Abstract: A manufacturing method of a semiconductor device which can decrease the degradation of an element due to plasma in the LDD formation process is provided. The degradation of an element due to plasma is decreased by forming an element having an LDD structure according to a manufacturing method of a semiconductor device using a hard mask. Covering the substrate by an electrically conductive film allover, the density of electric charge accumulated in a gate electrode in the plasma process such as anisotropic etching can be reduced, and the degradation due to plasma process can be reduced.
    Type: Application
    Filed: July 31, 2008
    Publication date: December 4, 2008
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Akira ISIKAWA
  • Patent number: 7422933
    Abstract: A manufacturing method of a semiconductor device which can decrease the degradation of an element due to plasma in the LDD formation process is provided. The degradation of an element due to plasma is decreased by forming an element having an LDD structure according to a manufacturing method of a semiconductor device using a hard mask. Covering the substrate by an electrically conductive film allover, the density of electric charge accumulated in a gate electrode in the plasma process such as anisotropic etching can be reduced, and the degradation due, to plasma process can be reduced.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: September 9, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Akira Isikawa
  • Publication number: 20060118888
    Abstract: A manufacturing method of a semiconductor device which can decrease the degradation of an element due to plasma in the LDD formation process is provided. The degradation of an element due to plasma is decreased by forming an element having an LDD structure according to a manufacturing method of a semiconductor device using a hard mask. Covering the substrate by an electrically conductive film allover, the density of electric charge accumulated in a gate electrode in the plasma process such as anisotropic etching can be reduced, and the degradation due, to plasma process can be reduced.
    Type: Application
    Filed: January 10, 2006
    Publication date: June 8, 2006
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Akira Isikawa
  • Patent number: 7009262
    Abstract: A manufacturing method of a semiconductor device which can decrease the degradation of an element due to plasma in the LDD formation process is provided. The degradation of an element due to plasma is decreased by forming an element having an LDD structure according to a manufacturing method of a semiconductor device using a hard mask. Covering the substrate by an electrically conductive film allover, the density of electric charge accumulated in a gate electrode in the plasma process such as anisotropic etching can be reduced, and the degradation due to plasma process can be reduced.
    Type: Grant
    Filed: September 24, 2003
    Date of Patent: March 7, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Akira Isikawa
  • Patent number: 6201396
    Abstract: A terrestrial change prediction apparatus including an indicator having a fixing member made of a nonmagnetic material and a plurality of magnetic bodies each having an N-pole end and an S-pole end and fixedly secured to the fixing member with the same magnetic polarity ends facing to each other so that a magnetic repulsive force is produced therebetween. The indicator is rotatably supported such that the magnetic bodies normally orient in a substantially constant direction. Before a terrestrial change such as an earthquake occurs, the indicator displaces. By measuring the displacement of the indicator, an occurrence of a terrestrial change can be predected.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: March 13, 2001
    Inventors: Tomoo Matsuo, Ayako Isikawa, Akira Isikawa