Patents by Inventor Akira Kawahashi
Akira Kawahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8716121Abstract: An ohmic electrode for a p-type SiC semiconductor, and a method of forming the ohmic electrode. The ohmic electrode has an ohmic electrode layer, which has an amorphous structure and which is made of a Ti(1-x-y)Si(x)C(y) ternary film of which a composition ratio is within a composition range that is surrounded by two lines and two curves expressed by an expression x=0 (0.35?y?0.5), an expression y=?1.120x+0.5200 (0.1667?x?0.375), an expression y=1.778(x?0.375)2+0.1 (0?x?0.375) and an expression y=?2.504x2?0.5828x+0.5 (0?x?0.1667) and that excludes the line expressed by the expression x=0. The ohmic layer is directly laminated on a surface of a p-type SiC semiconductor.Type: GrantFiled: August 4, 2010Date of Patent: May 6, 2014Assignee: Toyota Jidosha Kabushiki KaishaInventors: Akinori Seki, Masahiro Sugimoto, Akira Kawahashi, Yasuo Takahashi, Masakatsu Maeda
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Patent number: 8633101Abstract: A manufacturing method of a semiconductor device including an electrode having low contact resistivity to a nitride semiconductor is provided. The manufacturing method includes a carbon containing layer forming step of forming a carbon containing layer containing carbon on a nitride semiconductor layer, and a titanium containing layer forming step of forming a titanium containing layer containing titanium on the carbon containing layer. A complete solid solution Ti (C, N) layer of TiN and TiC is formed between the titanium containing layer and the nitride semiconductor layer. As a result, the titanium containing layer comes to be in ohmic contact with the nitride semiconductor layer throughout the border therebetween.Type: GrantFiled: September 2, 2010Date of Patent: January 21, 2014Assignee: Toyota Jidosha Kabushiki KaishaInventors: Masahiro Sugimoto, Akinori Seki, Akira Kawahashi, Yasuo Takahashi, Masakatsu Maeda
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Publication number: 20120217639Abstract: A manufacturing method of a semiconductor device including an electrode having low contact resistivity to a nitride semiconductor is provided. The manufacturing method includes a carbon containing layer forming step of forming a carbon containing layer containing carbon on a nitride semiconductor layer, and a titanium containing layer forming step of forming a titanium containing layer containing titanium on the carbon containing layer. A complete solid solution Ti (C, N) layer of TiN and TiC is formed between the titanium containing layer and the nitride semiconductor layer. As a result, the titanium containing layer comes to be in ohmic contact with the nitride semiconductor layer throughout the border therebetween.Type: ApplicationFiled: September 2, 2010Publication date: August 30, 2012Applicant: TOYOTA JIDOSHA KABUSHIKI KAIHSAInventors: Masahiro Sugimoto, Akinori Seki, Akira Kawahashi, Yasuo Takahashi, Masakatsu Maeda
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Publication number: 20120132927Abstract: An ohmic electrode for a p-type SiC semiconductor, and a method of forming the ohmic electrode. The ohmic electrode has an ohmic electrode layer, which has an amorphous structure and which is made of a Ti(1?x?y)Si(s)C(y) ternary film of which a composition ratio is within a composition range that is surrounded by two lines and two curves expressed by an expression x=0 (0.35?y?0.5), an expression y=?1.120x+0.5200 (0.1667?x?0.375), an expression y=1.778(x?0.375)2+0.1 (0?x?0.375) and an expression y=?2.504x2?0.5828x+0.5 (0?x?0.1667) and that excludes the line expressed by the expression x=0. The ohmic layer is directly laminated on a surface of a p-type SiC semiconductor.Type: ApplicationFiled: August 4, 2010Publication date: May 31, 2012Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Akinori Seki, Masahiro Sugimoto, Akira Kawahashi, Yasuo Takahashi, Masakatsu Maeda
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Publication number: 20110287626Abstract: The invention provides an ohmic electrode of a p-type SiC semiconductor element, which includes an ohmic electrode layer that is made of Ti3SiC2, and that is formed directly on a surface of a p-type SiC semiconductor. The invention also provides a method of forming an ohmic electrode of a p-type SiC semiconductor element. The ohmic electrode includes an ohmic electrode layer that is made of Ti3SiC2, and that is formed directly on a surface of a p-type SiC semiconductor. The method includes forming a ternary mixed film that includes Ti, Si, and C in a manner such that an atomic composition ratio, Ti:Si:C is 3:1:2, on a surface of a p-type SiC semiconductor to produce a laminated film; and annealing the produced laminated film under vacuum or under an inert gas atmosphere.Type: ApplicationFiled: January 29, 2010Publication date: November 24, 2011Inventors: Akinori Seki, Masahiro Sugimoto, Akira Kawahashi, Yasuo Takahashi, Masakatsu Maeda
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Patent number: 8008180Abstract: A method of forming an Ohmic contact on a P-type 4H—SiC and an Ohmic contact formed by the same are provided. A method of forming an Ohmic contact on a P-type 4H—SiC substrate including a deposition step of successively depositing a 1 to 60 nm thick first Al layer, Ti layer, and second Al layer on a P-type 4H—SiC substrate and an alloying step of forming an alloy layer between the SiC substrate and the Ti layer through the first Al layer by heat treatment in a nonoxidizing atmosphere. An Ohmic contact on a P-type 4H—SiC substrate formed by this method is also provided.Type: GrantFiled: March 13, 2008Date of Patent: August 30, 2011Assignees: Toyota Jidosha Kabushiki Kaisha, Osaka UniversityInventors: Yasuo Takahashi, Masakatsu Maeda, Akinori Seki, Akira Kawahashi, Masahiro Sugimoto
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Patent number: 7879705Abstract: A method is set forth of forming an ohmic electrode having good characteristics on a SiC semiconductor layer. In the method, a Ti-layer and an Al-layer are formed on a surface of the SiC substrate. The SiC substrate having the Ti-layer and the Al-layer is maintained at a temperature that is higher than or equal to a first temperature and lower than a second temperature until all Ti in the Ti-layer has reacted with Al. The first temperature is the minimum temperature of a temperature zone at which the Ti reacts with the Al to form Al3Ti, and the second temperature is the minimum temperature of a temperature zone at which the Al3Ti reacts with SiC to form Ti3SiC2. As a result of this maintaining of temperature step, an Al3Ti-layer is formed on the surface of the SiC substrate. The method also comprises further heating the SiC substrate having the Al3Ti-layer to a temperature that is higher than the second temperature.Type: GrantFiled: September 21, 2007Date of Patent: February 1, 2011Assignee: Toyota Jidosha Kabushiki KaishaInventors: Akira Kawahashi, Masahiro Sugimoto, Akinori Seki, Masakatsu Maeda, Yasuo Takahashi
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Publication number: 20100102332Abstract: A method of forming an Ohmic contact on a P-type 4H—SiC and an Ohmic contact formed by the same are provided. A method of forming an Ohmic contact on a P-type 4H—SiC substrate including a deposition step of successively depositing a 1 to 60 nm thick first Al layer, Ti layer, and second Al layer on a P-type 4H—SiC substrate and an alloying step of forming an alloy layer between the SiC substrate and the Ti layer through the first Al layer by heat treatment in a nonoxidizing atmosphere. An Ohmic contact on a P-type 4H—SiC substrate formed by this method is also provided.Type: ApplicationFiled: March 13, 2008Publication date: April 29, 2010Applicants: OSAKA UNIVERSITY, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yasuo Takahashi, Masakatsu Maeda, Akinori Seki, Akira Kawahashi, Masahiro Sugimoto
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Publication number: 20090233435Abstract: A method is set forth of forming an ohmic electrode having good characteristics on a SiC semiconductor layer. In the method, a Ti-layer and an Al-layer are formed on a surface of the SiC substrate. The SiC substrate having the Ti-layer and the Al-layer is maintained at a temperature that is higher than or equal to a first temperature and lower than a second temperature until all Ti in the Ti-layer has reacted with Al. The first temperature is the minimum temperature of a temperature zone at which the Ti reacts with the Al to form Al3Ti, and the second temperature is the minimum temperature of a temperature zone at which the Al3Ti reacts with SiC to form Ti3SiC2. As a result of this maintaining of temperature step, an Al3Ti-layer is formed on the surface of the SiC substrate. The method also comprises further heating the SiC substrate having the Al3Ti-layer to a temperature that is higher than the second temperature.Type: ApplicationFiled: September 21, 2007Publication date: September 17, 2009Inventors: Akira Kawahashi, Masahiro Sugimoto, Akinori Seki, Masakatsu Maeda, Yasuo Takahashi
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Patent number: 6509610Abstract: A semiconductor device is formed such that a contact surface between a p-type high-concentration semiconductor region and an n-type high-concentration buffer region assumes a convexo-concave shape. This makes it possible to enlarge an area of the contact surface between the p-type high-concentration semiconductor region and the n-type high-concentration buffer region. As a result, holes are injected into an n-type low-concentration drift region from the p-type high-concentration semiconductor region with higher efficiency and with a less voltage drop between the pn-junction. Thus, effects of conductivity modulation can be achieved sufficiently and the on-resistance and the voltage drop of an IGBT can be lowered.Type: GrantFiled: July 18, 2001Date of Patent: January 21, 2003Assignee: Toyota Jidosha Kabushiki KaishaInventors: Akira Kawahashi, Katsuhiko Nishiwaki
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Publication number: 20020013030Abstract: A semiconductor device is formed such that a contact surface between a p-type high-concentration semiconductor region and an n-type high-concentration buffer region assumes a convexo-concave shape. This makes it possible to enlarge an area of the contact surface between the p-type high-concentration semiconductor region and the n-type high-concentration buffer region. As a result, holes are injected into an n-type low-concentration drift region from the p-type high-concentration semiconductor region with higher efficiency and with a less voltage drop between the pn-junction. Thus, effects of conductivity modulation can be achieved sufficiently and the on-resistance and the voltage drop of an IGBT can be lowered.Type: ApplicationFiled: July 18, 2001Publication date: January 31, 2002Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Akira Kawahashi, Katsuhiko Nishiwaki
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Patent number: 4799769Abstract: A liquid crystal antidazzle mirror for turning OFF a power of a liquid crystal drive control circuit by a power switch provided between the liquid crystal drive control circuit and a power source comprising a capacitor of a predetermined capacity disposed between the power switch and the liquid crystal drive control circuit and connected in parallel between power lines to supply power from the capacitor to at least a mode memory circuit in the liquid crystal drive control circuit for a predetermined time determined by the discharging characteristic of the capacitor when the power switch is opened. Thus, the mirror can reset the set mode of the antidazzle mirror to the used mode immediately before a power switch is opened when the power switch is closed within a predetermined time after the power switch is opened.Type: GrantFiled: July 9, 1986Date of Patent: January 24, 1989Assignee: Toyota Jidosha Kabushiki KaishaInventors: Hiroshi Demura, Akira Kawahashi, Kazumi Hayashi, Sadao Kokubu
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Patent number: 4786145Abstract: A liquid crystal antidazzle mirror for supplying a power to liquid crystal drive control circuit when a key plate is inserted into a key cylinder which comprises a key position detecting switch for detecting that the key plate is inserted into the key cylinder, and an initializing circuit for initializing the liquid crystal drive control circuit to either special mode of predetermined antidazzle or dazzle state upon receiving a detection signal of the key position detecting switch. Thus, the antidazzle mirror can automatically initialize the antidazzle mirror to either special mode of a predetermined antidazzle and dazzle states when power is supplied from a battery.Type: GrantFiled: June 20, 1986Date of Patent: November 22, 1988Assignees: Toyota Jidosha Kabushiki Kaisha, Kabushiki Kaisha Tokai Tika Denki SeisakushoInventors: Hiroshi Demura, Akira Kawahashi, Yasuo Ohyama, Sadao Kokubu, Kouji Takizawa, Shigeru Iguchi
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Patent number: 4413424Abstract: An azimuth determinating apparatus wherein the azimuth sensor is oriented to a specified direction, and the deviation of the two-component detection signals of the azimuth sensor from the pointing direction of the azimuth sensor are corrected by the adjustment of the two-component detection signals with the adjusting circuit in accordance with the indication on the amount of deviation indicated by the indicating circuit, whereby distortion of the output signals due to the residual magnetism of the azimuth sensor is corrected and the true azimuth can be determined.Type: GrantFiled: October 16, 1981Date of Patent: November 8, 1983Assignees: Nippondenso Co., Ltd., Toyota Jidosha Kogyo Kabushiki KaishaInventors: Hiroaki Sasaki, Testuya Inoue, Yoshiharu Mineo, Sei Iguchi, Kazuhide Makita, Hiroshi Arai, Hajime Itoh, Hisatoshi Ohta, Masahiro Inazu, Akira Kawahashi