Patents by Inventor Akira Kazami

Akira Kazami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5285107
    Abstract: A hybrid integrated circuit device is provided with: a microcomputer, a plurality of peripheral circuit elements, and a non-volatile memory which is positioned adjacent to the microcomputer, all of which are interconnected by a plurality of specified conductive paths; pair of integrated circuit substrates on which is formed the conductive paths and a casing provided with the pair of integrated circuit substrates secured to the upper and lower surfaces of the casing, forming a sealed space between these surfaces. The microcomputer and the peripheral circuit elements are positioned in the sealed space and only the non-volatile memory is positioned in an exposed space. The hybrid integrated circuit device of the present invention has a compact and simple form with a high degree of mounting density as well as superior handling capabilities and reliability.
    Type: Grant
    Filed: April 18, 1990
    Date of Patent: February 8, 1994
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Akira Kazami, Osamu Nakamoto, Hisashi Shimizu, Katsumi Ohkawa, Yasuhiro Koike, Koji Nagahama, Masao Kaneko, Masakazu Ueno, Yasuo Saitou
  • Patent number: 5159433
    Abstract: In a position closest to the mounting position of a microcomputer in a casing of a hybrid integrated circuit device on which is mounted the microcomputer and its peripheral circuit elements, an insertion hole is formed for a non-volatile memory which feeds data to the microcomputer. A socket for connecting the non-volatile memory is provided at the bottom of this insertion hole. Because of this configuration it is possible to connect the microcomputer and the non-volatile memory at an extremely short distance and the mounting efficiency of the integrated circuit device is increased. In addition, the non-volatile memory can detachably be mounted. Furthermore, the external shape of the insertion hole for the non-volatile memory is essentially the same as the external shape of the non-volatile memory so that when the non-volatile memory is inserted, the entire surface of this hybrid integrated circuit device is almost flat, providing excellent handling characteristics.
    Type: Grant
    Filed: April 18, 1990
    Date of Patent: October 27, 1992
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Akira Kazami, Osamu Nakamoto, Hisashi Shimizu, Katsumi Ohkawa, Yasuhiro Koike, Koji Nagahama, Masao Kaneko, Masakazu Ueno, Yasuo Saitou
  • Patent number: 5032542
    Abstract: A method of mass-producing IC devices includes the steps of: forming a plurality of types of conductor patterns on a ribbonlike insulating substrate, separating the ribbonlike substrate to form a plurality of types of divided substrates, causing at least one of the conductor patterns of the same type to be included in each of the divided substrates, and sending the divided substrates including the conductor patterns of the same type to the same dedicated assembling line.
    Type: Grant
    Filed: October 31, 1989
    Date of Patent: July 16, 1991
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Akira Kazami, Masakazu Yamagishi, Sumio Ishihara, Kiyoshi Takahashi
  • Patent number: 4737672
    Abstract: A hybrid integrated circuit substrate for a motor is formed by an iron substrate (1), a resin layer (2) adhered on the same and a copper foil layer (3) adhered on the same. The resin layer (2) is formed of epoxy resin, and Kevlar fiber belonging to aromatic polyamide fiber is mixed therein in the form of cloth or paper. Thus, a clad formed by the resin layer (2) and the copper foil layer (3) has a thermal expansion coefficient close to that of the iron substrate (1), thereby to prevent warping caused in manufacturing of the hybrid integrated circuit substrate. The copper foil layer (3) is etched in prescribed configurations to form conductive paths (13), to which stator coils (5) and various circuit elements (14, 15) are connected.
    Type: Grant
    Filed: December 30, 1986
    Date of Patent: April 12, 1988
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Akira Kazami