Patents by Inventor Akira Kimitsuka

Akira Kimitsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10658321
    Abstract: An integrated circuit device includes a support substrate, a first semiconductor chip and a second semiconductor chip provided on the support substrate, and a connection member made of solder. The first semiconductor chip and the second semiconductor chip each includes a semiconductor substrate, an interconnect layer provided on the semiconductor substrate, and a pad provided on a side surface of the interconnect layer. The connection member contacts a side surface of the pad of the first semiconductor chip and a side surface of the pad of the second semiconductor chip.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: May 19, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hidekazu Inoto, Akira Kimitsuka, Takeshi Yamamoto, Mariko Habu, Kanji Osari
  • Publication number: 20190088612
    Abstract: An integrated circuit device includes a support substrate, a first semiconductor chip and a second semiconductor chip provided on the support substrate, and a connection member made of solder. The first semiconductor chip and the second semiconductor chip each includes a semiconductor substrate, an interconnect layer provided on the semiconductor substrate, and a pad provided on a side surface of the interconnect layer. The connection member contacts a side surface of the pad of the first semiconductor chip and a side surface of the pad of the second semiconductor chip.
    Type: Application
    Filed: March 14, 2018
    Publication date: March 21, 2019
    Inventors: Hidekazu Inoto, Akira Kimitsuka, Takeshi Yamamoto, Mariko Habu, Kanji Osari
  • Patent number: 7115471
    Abstract: There is provided a method of manufacturing a semiconductor device including a nonvolatile memory including forming an element isolation area surrounding an element area in a semiconductor substrate doped with a first type conductive impurity, forming a gate insulating film on the element area, forming selectively a cap film on the gate insulating film, burying selectively with a mask film surrounding the cap film on the gate insulating film, forming a tunnel window by removing selectively the cap film, forming an impurity diffusion layer in a surface region of the semiconductor substrate underneath the gate insulating film by introducing a second type conductive impurity using the mask film as a mask, removing the gate insulating film in the tunnel window, forming a tunnel insulating film in the tunnel window, forming a floating gate electrode film, an inter-gate electrode film, and a control gate electrode film on the tunnel insulating film, and forming a source-drain in the semiconductor substrate to inter
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: October 3, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuyoshi Shinada, Akira Kimitsuka
  • Publication number: 20050136597
    Abstract: There is provided a method of manufacturing a semiconductor device including a nonvolatile memory including forming an element isolation area surrounding an element area in a semiconductor substrate doped with a first type conductive impurity, forming a gate insulating film on the element area, forming selectively a cap film on the gate insulating film, burying selectively with a mask film surrounding the cap film on the gate insulating film, forming a tunnel window by removing selectively the cap film, forming an impurity diffusion layer in a surface region of the semiconductor substrate underneath the gate insulating film by introducing a second type conductive impurity using the mask film as a mask, removing the gate insulating film in the tunnel window, forming a tunnel insulating film in the tunnel window, forming a floating gate electrode film, an inter-gate electrode film, and a control gate electrode film on the tunnel insulating film, and forming a source-drain in the semiconductor substrate to inter
    Type: Application
    Filed: October 12, 2004
    Publication date: June 23, 2005
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuyoshi Shinada, Akira Kimitsuka
  • Patent number: 4900079
    Abstract: A system which automatically moves a drivers seat between one of a plurality of preselected driving positions and a position wherein ingress and egress is facilitated is inhibited when a passenger is seated on the seat behind the drivers one.
    Type: Grant
    Filed: April 26, 1988
    Date of Patent: February 13, 1990
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Hideo Obara, Akira Kimitsuka, Takayuki Yanagishima