Patents by Inventor Akira KIYOI
Akira KIYOI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11881504Abstract: A semiconductor device according to the present disclosure includes: a first conductivity-type silicon substrate including a cell part and a termination part surrounding the cell part in plan view; a first conductivity-type emitter layer provided on a front surface of the silicon substrate in the cell part; a second conductivity-type collector layer provided on a back surface of the silicon substrate in the cell part; a first conductivity-type drift layer provided between the emitter layer and the collector layer; a trench gate provided to reach the drift layer from a front surface of the emitter layer; and a second conductivity-type well layer provided on the front surface of the silicon substrate in the termination part. Vacancies included in a crystal defect in the cell part are less than vacancies included in a crystal defect in the termination part.Type: GrantFiled: September 13, 2021Date of Patent: January 23, 2024Assignee: Mitsubishi Electric CorporationInventors: Kenji Suzuki, Yuki Haraguchi, Haruhiko Minamitake, Taiki Hoshi, Takuya Yoshida, Hidenori Koketsu, Yusuke Miyata, Akira Kiyoi
-
Publication number: 20230387218Abstract: A semiconductor device includes a drift region that is of first conductive type and formed in a semiconductor substrate; a hydrogen buffer region that is of first conductive type, positioned on the back surface side of the drift region, contains hydrogen as impurities, and has impurity concentration higher than impurity concentration of the drift region; a flat region that is of first conductive type, positioned on the back surface side of the hydrogen buffer region, and has impurity concentration higher than impurity concentration of the drift region; and a carrier injection layer that is of first or second conductive type, positioned on the back surface side of the flat region, and has impurity concentration higher than impurity concentrations of the hydrogen buffer region and the flat region. The hydrogen buffer region and the flat region each have a constant oxygen concentration of 1E16 atoms/cm3 to 6E17 atoms/cm3 inclusive.Type: ApplicationFiled: February 1, 2023Publication date: November 30, 2023Applicant: Mitsubishi Electric CorporationInventors: Taiki HOSHI, Kenji SUZUKI, Yuki HARAGUCHI, Haruhiko MINAMITAKE, Hidenori KOKETSU, Yusuke MIYATA, Akira KIYOI
-
Publication number: 20230335410Abstract: It is an object to provide technology enabling reduction in variation of an oxygen concentration among silicon wafers. A semiconductor device manufacturing method includes: a first step of introducing oxygen to increase an oxygen concentration of a silicon wafer when the oxygen concentration of the silicon wafer is lower than a predetermined threshold, and deriving oxygen to decrease the oxygen concentration of the silicon wafer when the oxygen concentration of the silicon wafer is higher than the threshold; a second step of forming a first surface structure; a third step of grinding the silicon wafer from a second surface; and a fourth step of forming a second surface structure.Type: ApplicationFiled: December 15, 2020Publication date: October 19, 2023Applicant: Mitsubishi Electric CorporationInventors: Akira KIYOI, Naoyuki KAWABATA, Tsuyoshi KAWAKAMI
-
Patent number: 11676996Abstract: In a step, acceptor ions are implanted from a back surface of a semiconductor substrate. In a step, a wet process of immersing the semiconductor substrate in a chemical solution including hydrofluoric acid is performed, to introduce hydrogen atoms into the semiconductor substrate. In a step, proton radiation is provided to the back surface of the semiconductor substrate, to introduce hydrogen atoms into the semiconductor substrate and form radiation-induced defects. In a step, an annealing process is performed on the semiconductor substrate, to form hydrogen-related donors by reaction of the hydrogen atoms and the radiation-induced defects and reduce the radiation-induced defects.Type: GrantFiled: April 24, 2018Date of Patent: June 13, 2023Assignee: MITSUBISHI ELECTRIC CORPORATIONInventor: Akira Kiyoi
-
Publication number: 20220181435Abstract: A semiconductor device according to the present disclosure includes: a first conductivity-type silicon substrate including a cell part and a termination part surrounding the cell part in plan view; a first conductivity-type emitter layer provided on a front surface of the silicon substrate in the cell part; a second conductivity-type collector layer provided on a back surface of the silicon substrate in the cell part; a first conductivity-type drift layer provided between the emitter layer and the collector layer; a trench gate provided to reach the drift layer from a front surface of the emitter layer; and a second conductivity-type well layer provided on the front surface of the silicon substrate in the termination part. Vacancies included in a crystal defect in the cell part are less than vacancies included in a crystal defect in the termination part.Type: ApplicationFiled: September 13, 2021Publication date: June 9, 2022Applicant: Mitsubishi Electric CorporationInventors: Kenji SUZUKI, Yuki HARAGUCHI, Haruhiko MINAMITAKE, Taiki HOSHI, Takuya YOSHIDA, Hidenori KOKETSU, Yusuke MIYATA, Akira KIYOI
-
Publication number: 20200273970Abstract: An object is to provide a technique that can suppress the surge voltage at turn-off without increasing the thickness of a semiconductor device such as an IGBT. A semiconductor device includes first to fourth semiconductor layers stacked in order of the first to fourth semiconductor layers, each having a first conductivity type, and also includes a base layer, an emitter layer, a gate electrode, a collector layer, and a collector electrode. The second semiconductor layer has the lowest impurity concentration of the first conductivity type among the first to fourth semiconductor layers, and the impurity concentration of the first conductivity type of the third semiconductor layer is higher than the impurity concentration of the first conductivity type of the fourth semiconductor layer.Type: ApplicationFiled: December 6, 2017Publication date: August 27, 2020Applicant: Mitsubishi Electric CorporationInventors: Satoshi OKUDA, Akihiko FURUKAWA, Akira KIYOI
-
Publication number: 20200135847Abstract: In a step, acceptor ions are implanted from a back surface of a semiconductor substrate. In a step, a wet process of immersing the semiconductor substrate in a chemical solution including hydrofluoric acid is performed, to introduce hydrogen atoms into the semiconductor substrate. In a step, proton radiation is provided to the back surface of the semiconductor substrate, to introduce hydrogen atoms into the semiconductor substrate and form radiation-induced defects. In a step, an annealing process is performed on the semiconductor substrate, to form hydrogen-related donors by reaction of the hydrogen atoms and the radiation-induced defects and reduce the radiation-induced defects.Type: ApplicationFiled: April 24, 2018Publication date: April 30, 2020Applicant: Mitsubishi Electric CorporationInventor: Akira KIYOI
-
Patent number: 9922836Abstract: A semiconductor device manufacturing method of present application includes a catalytic step of depositing catalytic metal on a surface of a semiconductor substrate, an oxide removing step of removing oxide formed on the surface of the semiconductor substrate in the catalytic step, an additional catalytic step of depositing catalytic metal on the surface of the semiconductor substrate exposed in the oxide removing step, and a plating step of forming a metal film on the surface of the semiconductor substrate by means of an electroless plating method after the additional catalytic step.Type: GrantFiled: August 28, 2014Date of Patent: March 20, 2018Assignee: Mitsubishi Electric CorporationInventors: Koichiro Nishizawa, Akira Kiyoi
-
Publication number: 20170154777Abstract: A semiconductor device manufacturing method of present application includes a catalytic step of depositing catalytic metal on a surface of a semiconductor substrate, an oxide removing step of removing oxide formed on the surface of the semiconductor substrate in the catalytic step, an additional catalytic step of depositing catalytic metal on the surface of the semiconductor substrate exposed in the oxide removing step, and a plating step of forming a metal film on the surface of the semiconductor substrate by means of an electroless plating method after the additional catalytic step.Type: ApplicationFiled: August 28, 2014Publication date: June 1, 2017Applicant: Mitsubishi Electric CorporationInventors: Koichiro NISHIZAWA, Akira KIYOI