Patents by Inventor Akira Miho

Akira Miho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7535388
    Abstract: A semiconductor integrated circuit includes a bus, a CPU connected to the bus, a DAC having a digital input thereof connected to the bus, an ADC having a digital output thereof connected to the bus, a voltage generating circuit, a first switch configured to cause an electrical coupling between an analog input of the ADC and the voltage generating circuit to switch between a conductive state and a nonconductive state, and a second switch configured to cause an electrical coupling between an analog output of the DAC and the analog input of the ADC to switch between a conductive state and a nonconductive state.
    Type: Grant
    Filed: August 22, 2007
    Date of Patent: May 19, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventor: Akira Miho
  • Publication number: 20080079620
    Abstract: A semiconductor integrated circuit includes a bus, a CPU connected to the bus, a DAC having a digital input thereof connected to the bus, an ADC having a digital output thereof connected to the bus, a voltage generating circuit, a first switch configured to cause an electrical coupling between an analog input of the ADC and the voltage generating circuit to switch between a conductive state and a nonconductive state, and a second switch configured to cause an electrical coupling between an analog output of the DAC and the analog input of the ADC to switch between a conductive state and a nonconductive state.
    Type: Application
    Filed: August 22, 2007
    Publication date: April 3, 2008
    Inventor: Akira Miho
  • Patent number: 7310026
    Abstract: A semiconductor integrated circuit includes a reference-voltage circuit configured to produce a predetermined reference voltage at an output node thereof, a comparator, coupled to a node to which an oscillating signal is supplied and to the output node of the reference-voltage circuit, to produce a result of comparison at an output node thereof, the result of comparison being made by comparing a voltage of the oscillating signal with the predetermined reference voltage, and a detection circuit coupled to the output node of the comparator to produce, in response to the result of comparison, a stable-state-detection signal indicating that the oscillating signal has an amplitude larger than the reference voltage.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: December 18, 2007
    Assignee: Fujitsu Limited
    Inventor: Akira Miho
  • Publication number: 20060197603
    Abstract: A semiconductor integrated circuit includes a reference-voltage circuit configured to produce a predetermined reference voltage at an output node thereof, a comparator, coupled to a node to which an oscillating signal is supplied and to the output node of the reference-voltage circuit, to produce a result of comparison at an output node thereof, the result of comparison being made by comparing a voltage of the oscillating signal with the predetermined reference voltage, and a detection circuit coupled to the output node of the comparator to produce, in response to the result of comparison, a stable-state-detection signal indicating that the oscillating signal has an amplitude larger than the reference voltage.
    Type: Application
    Filed: November 14, 2005
    Publication date: September 7, 2006
    Inventor: Akira Miho
  • Publication number: 20060053264
    Abstract: A semiconductor device includes a data hold circuit configured to acquire data from a data bus and hold the data therein in response to assertion of a write signal, a prohibited set value hold circuit configured to store a predetermined prohibited set value, and a comparison circuit coupled to the data hold circuit and the prohibited set value hold circuit, and configured to assert a prohibition signal in response to a match between the prohibited set value stored in the prohibited set value hold circuit and the data held in the data hold circuit, the assertion of the prohibition signal preventing the data from being written to a predetermined register.
    Type: Application
    Filed: February 24, 2005
    Publication date: March 9, 2006
    Applicant: FUJITSU LIMITED
    Inventor: Akira Miho
  • Patent number: 6870778
    Abstract: An semiconductor device includes a voltage-decreasing regulator which converts a source voltage into an output voltage in accordance with a control signal, the regulator supplying the output voltage to an internal module via a power line. An analog-to-digital converter converts the output voltage received from the power line, into an output signal indicating a value of the output voltage. A voltage monitoring circuit has a control register holding a value predetermined for a selected operational mode. The voltage monitoring circuit generates the control signal based on a result of comparison between the value indicated by the output signal of the converter and the value held by the control register, and outputs the control signal to the regulator so that the regulator supplies the output voltage, adjusted to an optimal output voltage for the selected operational mode by the control signal, to the internal module.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: March 22, 2005
    Assignee: Fujitsu Limited
    Inventors: Yukihiro Ozawa, Akira Miho
  • Publication number: 20030178643
    Abstract: An semiconductor device includes a voltage-decreasing regulator which converts a source voltage into an output voltage in accordance with a control signal, the regulator supplying the output voltage to an internal module via a power line. An analog-to-digital converter converts the output voltage received from the power line, into an output signal indicating a value of the output voltage. A voltage monitoring circuit has a control register holding a value predetermined for a selected operational mode. The voltage monitoring circuit generates the control signal based on a result of comparison between the value indicated by the output signal of the converter and the value held by the control register, and outputs the control signal to the regulator so that the regulator supplies the output voltage, adjusted to an optimal output voltage for the selected operational mode by the control signal, to the internal module.
    Type: Application
    Filed: February 27, 2003
    Publication date: September 25, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Yukihiro Ozawa, Akira Miho
  • Patent number: 5252976
    Abstract: An analog-to-digital converter includes a sample and hold circuit for sampling and holding an analog input signal, a comparator circuit for comparing the analog input signal held by the sample and hold circuit with an input signal and generating an output signal, a control circuit for generating a digital signal based on the output signal of the comparator circuit, a digital-to-analog converter for converting the digital signal generated from the control circuit into an analog signal and for supplying the analog signal to the comparator circuit as the input signal, and an initial setting circuit for initializing the analog input signal held by the sample and hold circuit and the input signal which is output from the digital-to-analog converter to a reference voltage.
    Type: Grant
    Filed: July 25, 1991
    Date of Patent: October 12, 1993
    Assignee: Fujitsu Limited
    Inventors: Akira Miho, Tatsuya Akiyama, Hideki Isobe