Patents by Inventor Akira Mizumura

Akira Mizumura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8922686
    Abstract: A method of producing a solid-state image pickup apparatus, including the steps of: forming a plurality of light-receiving portions on a substrate; forming a plurality of transfer gates to be connected to the plurality of light-receiving portions formed on the substrate; forming an insulation film on the substrate; exposing a base by etching the insulation film so that the etched part of the insulation film between the adjacent transfer gates tapers away; and injecting an impurity into the exposed part using the insulation film that has remained after the etching as a mask to thus form an impurity injection portion.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: December 30, 2014
    Assignee: Sony Corporation
    Inventor: Akira Mizumura
  • Patent number: 8329490
    Abstract: A method of producing a solid-state image pickup apparatus, including the steps of: forming a plurality of light-receiving portions on a substrate; forming a plurality of transfer gates to be connected to the plurality of light-receiving portions formed on the substrate; forming an insulation film on the substrate; exposing a base by etching the insulation film so that the etched part of the insulation film between the adjacent transfer gates tapers away; and injecting an impurity into the exposed part using the insulation film that has remained after the etching as a mask to thus form an impurity injection portion.
    Type: Grant
    Filed: January 14, 2010
    Date of Patent: December 11, 2012
    Assignee: Sony Corporation
    Inventor: Akira Mizumura
  • Patent number: 8178933
    Abstract: A semiconductor device including first and second transistors, each of the first and second transistors being formed with a plurality of fin transistors, and the first and second transistors being connected in parallel to electrically share a source, wherein the plurality of fin transistors each include a fin activation layer, the fin activation layer protruding from a semiconductor substrate, a source layer serving as the source being formed on one end, and a drain layer on the other end of the fin activation layer so as to form a channel region, the fin activation layers are arranged adjacent to each other in parallel, and the drain layers are disposed so that the currents flow through the plurality of fin transistors in opposite directions between the first and second transistors.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: May 15, 2012
    Assignee: Sony Corporation
    Inventors: Akira Mizumura, Hiroaki Ammo, Tetsuya Oishi
  • Publication number: 20110186932
    Abstract: A semiconductor device including first and second transistors, each of the first and second transistors being formed with a plurality of fin transistors, and the first and second transistors being connected in parallel to electrically share a source, wherein the plurality of fin transistors each include a fin activation layer, the fin activation layer protruding from a semiconductor substrate, a source layer serving as the source being formed on one end, and a drain layer on the other end of the fin activation layer so as to form a channel region, the fin activation layers are arranged adjacent to each other in parallel, and the drain layers are disposed so that the currents flow through the plurality of fin transistors in opposite directions between the first and second transistors.
    Type: Application
    Filed: March 3, 2011
    Publication date: August 4, 2011
    Applicant: SONY CORPORATION
    Inventors: Akira Mizumura, Hiroaki Ammo, Tetsuya Oishi
  • Patent number: 7932567
    Abstract: Disclosed herein is a semiconductor device including: first and second transistors, each of the first and second transistors being formed with a plurality of fin transistors, and the first and second transistors being connected in parallel to electrically share a source, wherein the plurality of fin transistors each include a fin activation layer, the fin activation layer protruding from a semiconductor substrate, a source layer serving as the source being formed on one end, and a drain layer on the other end of the fin activation layer so as to form a channel region, the fin activation layers are arranged adjacent to each other in parallel, and the drain layers are disposed so that the currents flow through the plurality of fin transistors in opposite directions between the first and second transistors.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: April 26, 2011
    Assignee: Sony Corporation
    Inventors: Akira Mizumura, Hiroaki Ammo, Tetsuya Oishi
  • Patent number: 7858484
    Abstract: A semiconductor device includes a substrate, an insulating film disposed on the substrate, a resistor groove disposed in the insulating film, and a resistor disposed in the resistor groove. The resistor is separated from all side surfaces of the resistor groove by a predetermined distance.
    Type: Grant
    Filed: April 11, 2008
    Date of Patent: December 28, 2010
    Assignee: Sony Corporation
    Inventor: Akira Mizumura
  • Publication number: 20100220227
    Abstract: A method of producing a solid-state image pickup apparatus, including the steps of: forming a plurality of light-receiving portions on a substrate; forming a plurality of transfer gates to be connected to the plurality of light-receiving portions formed on the substrate; forming an insulation film on the substrate; exposing a base by etching the insulation film so that the etched part of the insulation film between the adjacent transfer gates tapers away; and injecting an impurity into the exposed part using the insulation film that has remained after the etching as a mask to thus form an impurity injection portion.
    Type: Application
    Filed: January 14, 2010
    Publication date: September 2, 2010
    Applicant: Sony Corporation
    Inventor: Akira Mizumura
  • Publication number: 20090230483
    Abstract: Disclosed herein is a semiconductor device including: first and second transistors, each of the first and second transistors being formed with a plurality of fin transistors, and the first and second transistors being connected in parallel to electrically share a source, wherein the plurality of fin transistors each include a fin activation layer, the fin activation layer protruding from a semiconductor substrate, a source layer serving as the source being formed on one end, and a drain layer on the other end of the fin activation layer so as to form a channel region, the fin activation layers are arranged adjacent to each other in parallel, and the drain layers are disposed so that the currents flow through the plurality of fin transistors in opposite directions between the first and second transistors.
    Type: Application
    Filed: February 20, 2009
    Publication date: September 17, 2009
    Applicant: SONY CORPORATION
    Inventors: Akira Mizumura, Hiroaki Ammo, Tetsuya Oishi
  • Publication number: 20080258232
    Abstract: A semiconductor device includes a substrate, an insulating film disposed on the substrate, a resistor groove disposed in the insulating film, and a resistor disposed in the resistor groove. The resistor is separated from all side surfaces of the resistor groove by a predetermined distance.
    Type: Application
    Filed: April 11, 2008
    Publication date: October 23, 2008
    Applicant: SONY CORPORATION
    Inventor: Akira Mizumura
  • Publication number: 20020009888
    Abstract: There is provided a method of producing a semiconductor device in which TAT can be improved while withstand voltage of a damaged insulating film is secured. A TEOS film is formed to cover a gate wiring line on a substrate, and a side wall is formed on a wall of the gate wiring line through the TEOS film. After ion implantation is carried out from above the side wall, the side wall is removed by dry etching. Thereafter, the surface of the TEOS film is exposed to a film formation atmosphere of the TEOS film. By this, the damage given to the surface of the TEOS film by the dry etching for removing the side wall is restored. Then, the withstand voltage of the TEOS film is secured without forming a new film for reinforcement.
    Type: Application
    Filed: July 17, 2001
    Publication date: January 24, 2002
    Applicant: Sony Corporation
    Inventor: Akira Mizumura