Abstract: A method for cleaning a substrate processing apparatus includes mounting a substrate on a mounting portion of an electrostatic chuck of the substrate processing apparatus to process the substrate; mounting a protector including a small diameter portion that covers the mounting portion and a large diameter portion that is disposed apart from an edge ring disposed on an outer periphery of the mounting portion and has a diameter larger than that of the small diameter portion, on the mounting portion; and supplying a cleaning gas, thereby removing by-products deposited between the mounting portion and the edge ring.

Abstract: The present invention provides a stage which comprises: a plate-shaped member having a mounting surface on which a workpiece to be processed is mounted and a rear surface facing the mounting surface, said plate-shaped member being provided with a through hole that penetrates through the mounting surface and the rear surface; and an embedded member disposed inside the through hole. This stage is configured such that the surface of the embedded member is provided with at least one of a concave portion and a convex portion.

Abstract: A method for cleaning a substrate processing apparatus includes mounting a substrate on a mounting portion of an electrostatic chuck of the substrate processing apparatus to process the substrate; mounting a protector including a small diameter portion that covers the mounting portion and a large diameter portion that is disposed apart from an edge ring disposed on an outer periphery of the mounting portion and has a diameter larger than that of the small diameter portion, on the mounting portion; and supplying a cleaning gas, thereby removing by-products deposited between the mounting portion and the edge ring.

Abstract: A substrate support is provided that includes: a base; an electrostatic chuck on which a substrate is placed; an electrode provided in the electrostatic chuck; a contact portion of the electrode; an adhesive layer that bonds the electrostatic chuck with the base and that does not cover the contact portion; and a power supply terminal contacting the contact portion of the electrode without being fixed to the contact portion.

Abstract: An edge ring to be disposed to encircle a substrate is provided. The edge ring includes a bottom used to define vertical heights that are from points on the circumference of a virtual circle, to the bottom of the edge ring, the virtual circle having a radius from a first point that is placed on a central axis of the edge ring, the first point being defined as the center of the virtual circle, the radius being half of a diameter ranging from an inner diameter to an outer diameter of the edge ring, and an absolute value indicative of a difference between a maximum value and a minimum value for the vertical heights being set to be less than or equal to a preset upper limit.

Abstract: A mounting table, to which a voltage is applied, includes an electrostatic chuck having a mounting surface for mounting a target object and a rear surface opposite to the mounting surface, the electrostatic chuck having a first through-hole formed in the mounting surface; a base, which is in contact with the rear surface of the electrostatic chuck, having a second through-hole communicating with the first through-hole; a cylindrical spacer inserted in the second through-hole; and a pin accommodated in the first through-hole and the spacer. Gaps are formed between the pin and inner walls of the first through-hole and the spacer, and the gap between the first through-hole and the pin is greater than the gap between the spacer and the pin.

Abstract: The present invention provides a stage which comprises: a plate-shaped member having a mounting surface on which a workpiece to be processed is mounted and a rear surface facing the mounting surface, said plate-shaped member being provided with a through hole that penetrates through the mounting surface and the rear surface; and an embedded member disposed inside the through hole. This stage is configured such that the surface of the embedded member is provided with at least one of a concave portion and a convex portion.

Abstract: A plasma processing apparatus includes a mounting stage including a mounting surface, on which an object to be processed is mounted, a back surface provided on a side opposite to the mounting surface, a plate-like member, in which a first hole penetrating through the mounting surface and the back surface is formed, and a base having a supporting surface for supporting the plate-like member and having a second hole communicating with the first hole; and an embedment member disposed inside the first and second holes, the first embedment member being disposed inside the first hole, the second embedment member being disposed inside the second hole, wherein the first embedment member and the second embedment member are not mutually fixed, and the first embedment member has a portion having a wider width than a width of an upper end portion on a lower side than the upper end portion.

Abstract: A mounting table, to which a voltage is applied, includes an electrostatic chuck having a mounting surface for mounting a target object and a rear surface opposite to the mounting surface, the electrostatic chuck having a first through-hole formed in the mounting surface; a base, which is in contact with the rear surface of the electrostatic chuck, having a second through-hole communicating with the first through-hole; a cylindrical spacer inserted in the second through-hole; and a pin accommodated in the first through-hole and the spacer. Gaps are formed between the pin and inner walls of the first through-hole and the spacer, and the gap between the first through-hole and the pin is greater than the gap between the spacer and the pin.

Abstract: To provide a power amplifier circuit which is capable of reducing a phase error of an output signal in a case where an amplitude of an input signal is relatively small, as well as a transmitter and a wireless communication device using the same. A constant envelope signal generation circuit (20) converts an input signal (Si) having envelope variation into a first constant envelope signal (Sd1) and a second constant envelope signal (Sd2) having the same amplitude and different phases, and outputs the signals. A first amplifier (11) amplifies the first constant envelope signal (Sd1). A second amplifier (12) amplifies the second constant envelope signal (Sd2). An output adder (13) outputs an amplified output signal having envelope variation based on the amplified signals output from the first amplifier (11) and the second amplifier (12).

Abstract: To provide a power amplifier circuit, which is capable of amplifying a signal having envelope variation with high power added efficiency, and exhibits low power consumption and high versatility, as well as to provide a transmitter and a wireless communication device using the power amplifier circuit, the power amplifier circuit includes: a constant envelope signal generation circuit (20) for converting an input signal (Si) having envelope variation into two constant envelope signals (Sd1, Sd2); a first and a second amplifiers (11, 12) for amplifying the two constant envelope signals to output two amplified signals (Sh1, Sh2); and an output adder (13) for performing vector addition of the two amplified signals.

Abstract: Provided are an amplification circuit capable of amplifying an input signal having a changing duty ratio with high efficiency, and a transmission device and a communication device using the amplification circuit. The amplification circuit includes: a transistor circuit (10) having a pulse wave first signal having a changing duty ratio input, and a second signal obtained by amplifying the pulse wave first signal output; and a matching circuit (20) having the second signal input and a third signal having a fundamental frequency of the pulse wave first signal output. An impedance of the matching circuit (20) as seen from the transistor circuit side changes in accordance with the duty ratio of the pulse wave first signal. The transmission device and the communication device each use the amplification circuit.

Abstract: To provide an adder capable of obtaining an addition signal of a plurality of high frequency signals, and also a power combiner, a quadrature modulator, a quadrature demodulator, a power amplifier, a transmitter, and a wireless communicator, each of which uses the adder. Impedances (Zg, Zh) seen from a common output point (P3) of a plurality of first impedance circuits (110a, 110b) toward respective input terminals (102a, 102b) are set so that high frequency currents (Ig, Ih) are approximately zero. An impedance (Zs) seen from a first connection point (P1) toward the input terminals (102a, 102b) is set so that a high frequency current (Is) is approximately zero. An impedance (Zc) seen from the first connection point (P1) toward a circuit (150) is set so that a high frequency current (Ic) is approximately zero. An impedance (Zm) seen from a second connection point (P2) toward a power supply is set so that a high frequency current (Im) is approximately zero.

Abstract: Disclosed are an addition circuit that makes it possible to add two vector signals in a high-frequency region, a power amplifier circuit using the same, and a transmission device and communication device using the power amplifier circuit.

Abstract: To provide a power amplification device that can amplify an input signal having an envelope variation with high power-added efficiency in a wide frequency range, and a transmission device and a communication device using the power amplification device. A first orthogonal signal (Sd1) is generated by performing vector subtraction between first and second fundamental signals (Su1 and Su2) having the same amplitude and a phase difference ?? (0 degrees<??<180 degrees) therebetween. First and second fundamental signals are generated based on an input signal (Sin). A second orthogonal signal (Sd2) is generated by performing vector addition between the first and second fundamental signals (Su1 and Su2). First and second constant envelope signals (S1 and S2) are generated by performing vector addition between the second fundamental signal (Su2) and first and second constant envelope vector generation signals (e and ?e) obtained based on the first fundamental signal (Su1).

Abstract: Provided are a transfer gate circuit that has reduced disturbance in an output waveform thereof, a power combining circuit using the transfer gate circuit, and a transmission device and a communication device that use the power combining circuit. The transfer gate circuit includes: output terminals (3, 4); a transistor (5) including a drain connected to the output terminal (3); a transistor (6) including a drain connected to the output terminal (4); transistors (7, 8) each including a drain connected to the output terminal (3) and each including a source connected to a ground potential; and transistors (9, 10) each including a drain connected to the output terminal (4) and each including a source connected to the ground potential.

Abstract: To provide a power amplification device having a function of preventing deviation of the amplitude and phase of an output signal having amplified envelope variation from a predetermined value, and a transmission device and a communication device both using the same.

Abstract: In a case where two constant envelope signals corresponding to an input signal are generated through analog signal processing, variation in detection sensitivities of amplitudes of those signals is suppressed. At least one of a mixer (24) for detecting an amplitude of a first intermediate signal S1 and a mixer (26) for detecting an amplitude of a second intermediate signal S2 detects an amplitude of a given reference signal, and sampling hold circuits (36, 38) hold a voltage related to those amplitudes. Then, detection sensitivities of the mixer (24, 26) are corrected based on the held voltage.

Abstract: Provided is a detector device including: an amplifier (AMP1) for amplifying a voltage of an input electric signal and outputting the amplified electric signal; a first detector circuit (Det1) for outputting a first detection signal having a current corresponding to the voltage of the input electric signal; a second detector circuit (Det2) for outputting a second detection signal having a current corresponding to the voltage of the input electric signal; and a current summing circuit (SUM1) to which the first detection signal and the second detection signal are input, for outputting a third detection signal having a current value obtained by summing current values of the first detection signal and the second detection signal, in which an input signal to be detected is divided into two, one of the divided signals being input to the first detector circuit (Det1) and the other of the divided signals being input via the amplifier (AMP1) to the second detector circuit (Det2).

Abstract: An optical transmitter includes a light source that outputs light superposed with a pilot signal having a predetermined frequency; an optical modulating unit that modulates the light from the light source according to an input electric signal; a detecting unit that detects a high-output-side maximum value of signal light output from the optical modulating unit, a fluctuation width of the high-output-side maximum value, and a fluctuation width of a low-output-side minimum value; a bias-potential adjusting unit that adjusts a bias potential of an electric signal to be input to the optical modulating unit based on the detected maximum value; and an amplitude adjusting unit that adjusts an amplitude of the electric signal to be input to the optical modulating unit based on the fluctuation width of the high-output-side maximum value and the fluctuation width of the low-output-side minimum value.